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Forums

  • Servers and Cloud Computing forum

    The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
    101 questions
    romain beurdouche
    RE: ArmRAL: Wrong usage of k0 in LDPC rate matching 7 months ago
  • SoC Design and Simulation forum

    The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
    711 questions
    bill J
    While developing ISP in FVP, can the Sensor RAW file from a computer be sent to the input port of the ISP via the AVH-VSI interface? 9 days ago
  • SystemReady Forum

    The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
    15 questions
    vstehle
    RE: How to run ARM ACS 6 months ago Arm Employee Badge
  • TOSA forum

    Tensor Operator Set Architecture (TOSA) provides a set of whole-tensor operations commonly employed by Deep Neural Networks.
    1 question
    Oliver Beirne
    RE: Forum FAQs 1 month ago Arm Employee Badge
  • 恩智浦汽车电子MCU讨论区博

    4 questions
    Song Bin 宋斌
    RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼 over 10 years ago Arm Employee Badge
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All questions in this Community
  • Answered

    What is the size of the SystemReady Architecture Compliance Suite (ACS) complete test code +1

    • ACS
    • SystemReady
    3197 views
    1 reply
    Latest over 2 years ago
    by dbrooke Arm Employee Badge
  • Answered

    The SystemReady ACS tests are generally run on a bare metal system. Can the ACS tests be run under a U-Boot bootloader shell +1

    • Pre-Silicon
    • ACS
    • SystemReady
    3290 views
    1 reply
    Latest over 2 years ago
    by dbrooke Arm Employee Badge
  • Answered

    : In the pre silicon example I have, there is a PCIe exerciser imbedded in the emulation model that communicates with an API running on arm. If we have a real PCIe interface with a Mentor PCIe bridge, can we connect an external exerciser to it or must we +1

    • Pre-Silicon
    • SystemReady
    3015 views
    1 reply
    Latest over 2 years ago
    by dbrooke Arm Employee Badge
  • Answered

    How does BP131 Downsizer addressing work? 0

    • PrimeCell BP131
    1843 views
    1 reply
    Latest over 2 years ago
    by Colin Campbell Arm Employee Badge
  • Not Answered

    Keil Microvision 5 with Compiler 5 giving license error 0

    • MDK-Arm
    • Compilers
    • License Management
    1330 views
    1 reply
    Latest over 2 years ago
    by rkopsch Arm Employee Badge
  • Answered

    Duplicate IP address after changing the MAC address with netIF_SetOption +1

    • Keil
    • STM32 F1
    • networking
    • CMSIS
    2336 views
    4 replies
    Latest over 2 years ago
    by Volter_1122
  • Not Answered

    mpidr doesn't work for all PE 0

    • Cortex-A65
    746 views
    0 replies
    Started over 2 years ago
    by ele
  • Suggested Answer

    Code Coverage using armclang 0

    • Embedded Software
    2028 views
    1 reply
    Latest over 2 years ago
    by Ronan Synnott Arm Employee Badge
  • Answered

    Software level TrustZone for Cortex-M3/M4/M7 devices 0

    • AMBA 3 TrustZone Interrupt Controller (SP890)
    • Arm Trusted Firmware
    • Arm Architecture tools
    • TrustZone Controllers
    • Trusted Firmware-M
    • Armv7-M
    • TrustZone Address Space Controllers
    • GNU Arm
    • Trusted Execution Environment (TEE)
    • TrustZone
    2930 views
    4 replies
    Latest over 2 years ago
    by Ronan Synnott Arm Employee Badge
  • Not Answered

    Guidance on Plugin Architecture for CORTEX-M7 Firmware with FreeRTOS, Supporting PIC and Distinct RAM for Code and Data 0

    1317 views
    0 replies
    Started over 2 years ago
    by mastupristi1
  • Answered

    RTX5 training +1

    830 views
    2 replies
    Latest over 2 years ago
    by cfun
  • Suggested Answer

    Reading register values on FVP 0

    4001 views
    3 replies
    Latest over 2 years ago
    by Jacob Bramley Arm Employee Badge
  • Suggested Answer

    how does processor identify itself 0

    1059 views
    1 reply
    Latest over 2 years ago
    by EllieC Arm Employee Badge
  • Answered

    How to write a scatter file that produce a ELF with multiple load regions that have a common physical address range 0

    • Arm Compiler 6
    3511 views
    4 replies
    Latest over 2 years ago
    by PFA
  • Not Answered

    Cortex R5 - TCM memory MPU setting 0

    1391 views
    1 reply
    Latest over 2 years ago
    by shalmana
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