This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

[Cortex-R52] Turning on the MPU reduces the coremark results

Dear Arm Experts,

I found a strange phenomenon that if I enable the MPU, the coremak results will be reduced.

I did the test that only ONE region enabled for the SRAM address and enabled or disable MPU.

The MPU setting is as the follow:

/* Attr0 1111_1111b Normal Memory, Outer&Inner R/W allocate ,Write-Back non-transient */
/* Attr1 1011_1011b Normal Memory, Outer&Inner R/W allocate ,Write-Through non-transient */
/* Attr2 1000_1000b Normal Memory, Outer&Inner non-allocate ,Write-Through non-transient */
/* Attr3 0100_0100b Normal Memory, Outer&Inner Non-Cacheable */
/* Attr4 0000_0000b Device-nGnRnE memory */
/* Attr5 0000_0100b Device-nGnRE memory */
/* Attr6 0000_1000b Device-nGRE memory */
/* Attr7 0000_1100b Device-GRE memory */
#define ATTRINDEX0 (0 << 1)
#define ATTRINDEX1 (1 << 1)
#define ATTRINDEX2 (2 << 1)
#define ATTRINDEX3 (3 << 1)
#define ATTRINDEX4 (4 << 1)
#define ATTRINDEX5 (5 << 1)
#define ATTRINDEX6 (6 << 1)
#define ATTRINDEX7 (7 << 1)

static void EL1_MPU_AttributeSetting(void)
{
uint32_t val;

val = 0x4488bbff;
__set_MAIR0(val);

val = 0x0c080400;
__set_MAIR1(val);
}

The SRAM is set as the following:

startAddr = 0x30080000;
endAddr = 0x300CFFFF;
shareType = OUTER_SHAREABLE;
accessType = EL1RW_EL0RW;
executeType = EXECUTE_ENABLE;
permissionType = shareType + accessType + executeType;
attrIdx = ATTRINDEX0;

Any suggestions are  welcome!

Thanks in advance,

Gavin