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Keil forum
The Keil Forum is an open forum where you may post questions and comments about Keil products.
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MDK-Middleware 7.17.0 Compile Warning
3 hours ago
Morello forum
Morello is a research program led by Arm which could radically change the way we design and program processors in future, to enable better built-in security.
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RE: Morello Linux missing /lib/modules
18 days ago
Operating Systems forum
The latest forum discussions for all Arm technology relating to Operating Systems (OS)
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RE: Windows 11 24H2 on arm will refuse Cortex A72 ?
5 days ago
SoC Design and Simulation forum
The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
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AXI4 transaction
15 hours ago
SystemReady Forum
The SystemReady forum is for questions on all aspects of the Arm SystemReady certification program including specifications (for example Base System Architecture - BSA), the Arm Certification Suite and the Pre-silicon SystemReady program.
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RE: SystemReady and Pre-Silicon SystemReady FAQ
10 months ago
中文社区论区
请注意,该论坛已不再活跃。如果您想使用我们的英语论坛,请访问 https://community.arm.com/support-forums/,并选择合适的论坛来提出您的问题。
703
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RE: ARMv8 异常向量表,Current EL,Lower EL 到底什么意思呢,求教
over 1 year ago
恩智浦汽车电子MCU讨论区博
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RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼
over 8 years ago
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Not Answered
Inquire about the official DMIPS/MHz value for Cortex A53.
0
Cortex-A53
868
views
0
replies
Started
6 months ago
by
daehyunyoon
Answered
About Mali GPU index buffer processing (group of 4 indices)
+1
GPU Architecture
optimization
Optimization Solution
Mali GPUs
gpu
714
views
1
reply
Latest
6 months ago
by
Peter Harris
Suggested Answer
Hi I need help with enabling/disabling process if mmu and mpu in cortex r5 and cortex a53 so that two processor application variable cant access each other memory address value and modify them
0
897
views
2
replies
Latest
6 months ago
by
nit_001
Suggested Answer
How many cycles will CYCCNT count during CPU halt?
0
931
views
1
reply
Latest
6 months ago
by
Ronan Synnott
Not Answered
How to auto-vectorize fp16 loop under arm sve?
0
LLVM
GCC
Vectorization
326
views
0
replies
Started
6 months ago
by
yiwang
Answered
Cacheable=0 vs Shareable=1
0
Cache coherency
Cortex-R5
Memory Protection Unit (MPU)
840
views
2
replies
Latest
6 months ago
by
AakashKedia22
Suggested Answer
Filesystem is corrupted when sharing files from host to the Virtual Platform
0
1315
views
5
replies
Latest
6 months ago
by
pooja_srre
Not Answered
How to implement matrix multiplication and addition operations by operating the Ethos-u65 register
0
Ethos-U65
microNPU
2932
views
0
replies
Started
6 months ago
by
iStarChip
Suggested Answer
Problems with adding breakpoints in KEIL
0
413
views
1
reply
Latest
6 months ago
by
Ronan Synnott
Answered
Compiler 5 license error
0
617
views
1
reply
Latest
6 months ago
by
Ronan Synnott
Not Answered
question related to AxREGION in AXI
0
408
views
0
replies
Started
6 months ago
by
Harekrishna
Not Answered
Exclusive Access In AXI3/4/5
0
342
views
0
replies
Started
6 months ago
by
Harekrishna
Not Answered
Atomic transaction AMBA 5
0
366
views
0
replies
Started
6 months ago
by
Harekrishna
Not Answered
arm gnu toolchain 13.2.rel1 std::foramt bloats the binary
0
GCC
GNU Arm
GNU Toolchain
Cortex-M4
368
views
0
replies
Started
6 months ago
by
Hossein
Answered
the tflite file which pass vela the result is different from the tflite file without passing vela
+1
5610
views
2
replies
Latest
6 months ago
by
Ronan Synnott
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