Hi, I just wondering if there is a bridge<AXI data(64bit) to AHB data(32bit)>.
I know there is an IP(AHB LITE to AXI) in Xilinx. But it just support ONLY the 64bit to 64bit or 32bit to 32bit.
The NIC-400 is designed to be a multi-source, multi-destination configurable AXI interconnect.
But in its simplest form it is a single source to single destination component, not then requiring any address decoding and routing logic, and so is a configurable bridge.
So the bridge isn't included in the NIC-400 network, it IS the NIC-400 interconnect (in its simplest form).
You can also specify an AXI interconnect, with external interfaces that can be AXI3, AXI4, AHB-lite or APB protocol, and these "bridge" functions will then be implemented before or after the central AXI structure as part of the NIC-400 interconnect to give the required external interface protocols, data widths and clock domains.