While doing an unaligned transfer of 32-bit data on 64-bit data, using 0x001 address, lower address lines used to indicate an unaligned data transfer but what if this lower address line data also needs to be transferred? let say transfer size is 4.
how only 3 bytes are transferred in first transfer in INCR type burst, not whole 32-bits?
Because you used an unaligned start address.
The AXI protocol works best with aligned transfers, so by using an unaligned address you restrict the amount of data in an aligned range that you can transfer.
So using address 0x001 for a 32-bit INCR transfer tells the system that you will only be driving D[31:8] for the first transfer, and not D[7:0].
If you wanted to use the full 32-bits, use a 32-bit aligned start address.