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Cache Coherence for BigLittle CPUs and Arm Mali T628 MP6 GPU on the odroid XU3 board

I am using the odroid XU3 board. It has the Samsung Exynos5422 SoC. The SoC has BigLittle CPUs and the Arm Mali T628 MP6 GPU.  I would like to run the CPU and the GPU in parallel on different sections of the array that I am processing. Currently to enforce coherency I have to use clEnqueueMapBuffer and clEnqueueUnmapMemObject. Usage of these OpenCL functions gives a performance degradation and due to this running the CPU and GPU in parallel becomes pointless. I have the following questions.

1) Are the caches of the ARM CPU and the GPU on this SoC coherent ?

2) The GPU shows up as two devices in OpenCL. Are these GPUs cache coherent ?
3) Is there anyway to enforce coherency other than using MapBuffer and UnmapMemObject CL functions ?

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  • To clarify:

    Graphical applications, such as those using OpenGL ES, do not need to worry about the two clusters. Their applications will run on all 6 cores (T628-MP6) without modification.

    Compute applications, such as those using OpenCL, do need to worry about the two clusters. If they do not modify their application to utilise both CL devices in parallel, then they will only utilise 4 out of the 6 cores. With modification however, they can run on all 6 cores.

    Kind Regards,

    Michael McGeagh

Reply
  • To clarify:

    Graphical applications, such as those using OpenGL ES, do not need to worry about the two clusters. Their applications will run on all 6 cores (T628-MP6) without modification.

    Compute applications, such as those using OpenCL, do need to worry about the two clusters. If they do not modify their application to utilise both CL devices in parallel, then they will only utilise 4 out of the 6 cores. With modification however, they can run on all 6 cores.

    Kind Regards,

    Michael McGeagh

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