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Cache Coherence for BigLittle CPUs and Arm Mali T628 MP6 GPU on the odroid XU3 board

I am using the odroid XU3 board. It has the Samsung Exynos5422 SoC. The SoC has BigLittle CPUs and the Arm Mali T628 MP6 GPU.  I would like to run the CPU and the GPU in parallel on different sections of the array that I am processing. Currently to enforce coherency I have to use clEnqueueMapBuffer and clEnqueueUnmapMemObject. Usage of these OpenCL functions gives a performance degradation and due to this running the CPU and GPU in parallel becomes pointless. I have the following questions.

1) Are the caches of the ARM CPU and the GPU on this SoC coherent ?

2) The GPU shows up as two devices in OpenCL. Are these GPUs cache coherent ?
3) Is there anyway to enforce coherency other than using MapBuffer and UnmapMemObject CL functions ?

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  • thank you very much for your answer.

    mali t628 mp6  with which frequency can work?

    ARM just license the GPU IP to our silicon partners; the achievable top frequency depends on many aspects of physical implementation. This question is best aimed at the supplier of a specific chip.

    but whether mali-t628 mp6 can work at 695 mhz?

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  • thank you very much for your answer.

    mali t628 mp6  with which frequency can work?

    ARM just license the GPU IP to our silicon partners; the achievable top frequency depends on many aspects of physical implementation. This question is best aimed at the supplier of a specific chip.

    but whether mali-t628 mp6 can work at 695 mhz?

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