There is simple code
usRDelay(17); Comm_LineOut_Port=SendData.B.Bit02; usRDelay(17); Comm_LineOut_Port=SendData.B.Bit01; usRDelay(17); Comm_LineOut_Port=SendData.B.Bit00; usRDelay(17); Comm_LineOut_Port=1;
I compiled it by keil for arm ver v4.53.0.0(coretex m3)
I got below assambly code
But I meet unexpected code line 0083ae
0083ae e00b B |L1.33736| |L1.33712| DCD TimeAlarmFlags |L1.33716| DCD PwrOn_Redy_Cnt |L1.33720| DCD TimeFlags |L1.33724| DCD PCU_C |L1.33728| DCD GPIO_C |L1.33732| DCD uR0 |L1.33736|
So fuction usRDelay(17); is more delayed. Why unexpected code is generated? What is that code? (p.s. TimeAlarmFlags is defined unsigned char by me, but why that is suddenly located?)
;;;7580 usRDelay(17); 008346 2011 MOVS r0,#0x11 008348 491e LDR r1,|L1.33732| 00834a 7008 STRB r0,[r1,#0] 00834c bf00 NOP |L1.33614| 00834e 481d LDR r0,|L1.33732| 008350 7800 LDRB r0,[r0,#0] ; uR0 008352 1e40 SUBS r0,r0,#1 008354 f01000ff ANDS r0,r0,#0xff 008358 491a LDR r1,|L1.33732| 00835a 7008 STRB r0,[r1,#0] 00835c d1f7 BNE |L1.33614| ;;;7581 Comm_LineOut_Port=SendData.B.Bit02; 00835e f89d0000 LDRB r0,[sp,#0] 008362 f3c00180 UBFX r1,r0,#2,#1 008366 4816 LDR r0,|L1.33728| 008368 6800 LDR r0,[r0,#0] ; GPIO_C 00836a 6800 LDR r0,[r0,#0] 00836c f36120cb BFI r0,r1,#11,#1 008370 4913 LDR r1,|L1.33728| 008372 6809 LDR r1,[r1,#0] ; GPIO_C 008374 6008 STR r0,[r1,#0] ;;;7582 usRDelay(17); 008376 2011 MOVS r0,#0x11 008378 4912 LDR r1,|L1.33732| 00837a 7008 STRB r0,[r1,#0] 00837c bf00 NOP |L1.33662| 00837e 4811 LDR r0,|L1.33732| 008380 7800 LDRB r0,[r0,#0] ; uR0 008382 1e40 SUBS r0,r0,#1 008384 f01000ff ANDS r0,r0,#0xff 008388 490e LDR r1,|L1.33732| 00838a 7008 STRB r0,[r1,#0] 00838c d1f7 BNE |L1.33662| ;;;7583 Comm_LineOut_Port=SendData.B.Bit01; 00838e f89d0000 LDRB r0,[sp,#0] 008392 f3c00140 UBFX r1,r0,#1,#1 008396 480a LDR r0,|L1.33728| 008398 6800 LDR r0,[r0,#0] ; GPIO_C 00839a 6800 LDR r0,[r0,#0] 00839c f36120cb BFI r0,r1,#11,#1 0083a0 4907 LDR r1,|L1.33728| 0083a2 6809 LDR r1,[r1,#0] ; GPIO_C 0083a4 6008 STR r0,[r1,#0] ;;;7584 usRDelay(17); 0083a6 2011 MOVS r0,#0x11 0083a8 4906 LDR r1,|L1.33732| 0083aa 7008 STRB r0,[r1,#0] 0083ac bf00 NOP |L1.33710| 0083ae e00b B |L1.33736| |L1.33712| DCD TimeAlarmFlags |L1.33716| DCD PwrOn_Redy_Cnt |L1.33720| DCD TimeFlags |L1.33724| DCD PCU_C |L1.33728| DCD GPIO_C |L1.33732| DCD uR0 |L1.33736| 0083c8 48fb LDR r0,|L1.34744| 0083ca 7800 LDRB r0,[r0,#0] ; uR0 0083cc 1e40 SUBS r0,r0,#1 0083ce f01000ff ANDS r0,r0,#0xff 0083d2 49f9 LDR r1,|L1.34744| 0083d4 7008 STRB r0,[r1,#0] 0083d6 d1ea BNE |L1.33710| ;;;7585 Comm_LineOut_Port=SendData.B.Bit00; 0083d8 f89d0000 LDRB r0,[sp,#0] 0083dc 49f7 LDR r1,|L1.34748| 0083de 6809 LDR r1,[r1,#0] ; GPIO_C 0083e0 6809 LDR r1,[r1,#0] 0083e2 f36021cb BFI r1,r0,#11,#1 0083e6 48f5 LDR r0,|L1.34748| 0083e8 6800 LDR r0,[r0,#0] ; GPIO_C 0083ea 6001 STR r1,[r0,#0] ;;;7586 usRDelay(17); 0083ec 2011 MOVS r0,#0x11 0083ee 49f2 LDR r1,|L1.34744| 0083f0 7008 STRB r0,[r1,#0] 0083f2 bf00 NOP |L1.33780| 0083f4 48f0 LDR r0,|L1.34744| 0083f6 7800 LDRB r0,[r0,#0] ; uR0 0083f8 1e40 SUBS r0,r0,#1 0083fa f01000ff ANDS r0,r0,#0xff 0083fe 49ee LDR r1,|L1.34744| 008400 7008 STRB r0,[r1,#0] 008402 d1f7 BNE |L1.33780| ;;;7587 ;;;7588 Comm_LineOut_Port=1; 008404 48ed LDR r0,|L1.34748| 008406 6800 LDR r0,[r0,#0] ; GPIO_C 008408 6800 LDR r0,[r0,#0] 00840a f4206000 BIC r0,r0,#0x800 00840e f5006000 ADD r0,r0,#0x800 008412 49ea LDR r1,|L1.34748| 008414 6809 LDR r1,[r1,#0] ; GPIO_C 008416 6008 STR r0,[r1,#0]
Why would you want to remove it?
I'd go further. Remove it and watch your code fail.
The compiler and linker know so much more about how to build an executable image than the coder. Let it do it's job and you concentrate on getting the code doing what is needed.
Sorry but this mcu is synchronized other system. So I have to keep strict time. Helpless situation. I have to check micro second time.
I won't care this code if it's located other places. but I shoud care this function specifically. (specifically... __disable_irq(); ~ __enable_irq();)
Can I have any way prohibit this code specification area by preprocessor?
If you need to control and guarantee the specific instruction sequences, then why are you even thinking of doing this in any high-level language?!
If you rally need to control and guarantee the specific instruction sequences, then you need to write in assembler yourself.
But I cannot help thinking that this is the wrong way to go about "synchronising" your systems ...
Code looks unnecessarily verbose, the use of optimization would trim it significantly.
The literal pool needs to be placed close to where it is referenced based on the PC relative load used to access it. Again the verboseness of the code plays against you here.
Figure out what the time critical code actually is, and write that in assembler. You can use the LTORG directive to control the placement of the literals, which you'd typically place at the end of a function, or after a hard/unconditional branch.
A lot of CM3 implementation have a instruction cycle counter built in for testing/evaluating execution time.