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Setting Hardware Breakpoints

Good evening ,

i've got a problem with configuring Breakpoints on ARMv7 with XEN as a Hypervisor.
My goal is to implement some kind of Single Step by using "Address Mismatch" Breakpoints.
To do this, i try to set the following registers:

DBGBCR0 = 0b 0000 0000 0100 0000 0100 0000 0000 0111
which defines the BT as "Unlinked instruction address mismatch", PMC to "PL1/PL2" and setting the "Enable" bit

DBGBVR0 = 0b 0000 0000 0000 0000 0000 0000 0000 0000
which basically set the address which should be compared to 0 (can't be reached and therefore should trigger on every address)

And lastly:
DBGDSCREXT = 0000 0000 0000 0000 0100 0000 00 0001 00
which defines the "Monitor Debug Enable" and sets the "Methode of Debug Entry" to "Breakpoint debug event"

To route the exceptions to the Hypervisor (in my case it's xen) i'm setting different registers according to the ARM documentation. (including the TDE to enable routing)

My problem now is, that I won't recieve any Exceptions. I'm printing few Strings in the Hypervisor call handler and the Prefetch Abort Handler. But can't find any of them.

Tested by running a simple bash file and starting programs within the VM like "nano"

Does anybody has suggestions, if i have a wrong configuration of the Breakpoint registers, or if i'm simply not able to find my prints?

thank you in advance