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Logic Analyzer in Emulation

Hello,

I have used Logic analyzer many times in simulation but while trying to use that in emulation, there is some problem to setup the signal.

How to use Logic analyzer in Emulation? Is it possible?

I am debugging with J-Link debugger with SWD mode and SWO is also used. Is it enough or should I use ETM also? (I don't have ETM).

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  • Are you using a serial wire trace (data trace) or an streaming trace (aka ETM / instruction trace)?

    This is selected in Options for Target => Debug tab => Settings => Trace tab => "Trace Port". Check if the timestamp prescaler is the same between JTAG and SW in this dialog.

    You may also check the JTAG max clock in the debug tab, to see if it is setup correctly for the device.

    Does the trace status bar give any clues, in JTAG mode?
    www.keil.com/.../ulinkpro_trace_status.htm