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Cortex-M3 valid user code

This is quoted from datasheet:
"The reserved Cortex-M3 exception vector location 7 (offset 0x 001C in the vector table)
should contain the 2’s complement of the check-sum of table entries 0 through 6. This
causes the checksum of the first 8 table entries to be 0. The boot loader code checksums
the first 8 locations in sector 0 of the flash. If the result is 0, then execution control is
transferred to the user code."

how am I supposed to calculate the checksum of 7 entries, the following is the first 7 entries of my code:
68020010
69010000
71010000
73010000
75010000
77010000
79010000

E6F4FFEF (flash magic calculates this checksum!!!)

HOW????????????????????????????????????????????????

Parents
  • en.wikipedia.org/.../ARM_Cortex-M

    Additional silicon options:[6][7] Data endianness: Little-endian or big-endian. Unlike legacy ARM cores, the Cortex-M is permanently fixed in silicon as one of these choices.

    ARM deprecations
    The ARM architecture for ARM Cortex-M series removed some features from older legacy cores:[6][7]
    Endianness is chosen at silicon implementation in Cortex-M cores. Legacy cores allowed "on-the-fly" changing of the data endian mode.

    Silicon options:
    Data endianness: little-endian or BE-8 big-endian.

    (What is BE-8?)

Reply
  • en.wikipedia.org/.../ARM_Cortex-M

    Additional silicon options:[6][7] Data endianness: Little-endian or big-endian. Unlike legacy ARM cores, the Cortex-M is permanently fixed in silicon as one of these choices.

    ARM deprecations
    The ARM architecture for ARM Cortex-M series removed some features from older legacy cores:[6][7]
    Endianness is chosen at silicon implementation in Cortex-M cores. Legacy cores allowed "on-the-fly" changing of the data endian mode.

    Silicon options:
    Data endianness: little-endian or BE-8 big-endian.

    (What is BE-8?)

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