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mutual exclusion between ISR and a RTX Thread

I need to share a data structure used by a RTX Thread and and ISR. Its basically a circular queue for the serial port. Now the options that I am aware of are to either use isr_mbx_send() to post messages or else use isr_sem_send. But both the options come with a overhead.

Is there anything else that I can use, without disabling scheduling or interrupts and yet share the data structure?

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  • Just sharing a traditional round-robin buffer doesn't require you to lock any scheduling or similar, as long as the processor is capable of reading and writing the head and tail pointers atomically.

    The reader is owner of one of the pointers - where to fetch data. The writer is owner of the other pointer - where to put new data.

    A task switch or interrupt in the middle of a read/modify/write will not be dangerous. The worst case is that the reader has picked up an entry without having had time to inform the writer - so the writer may sometimes see a one-entry smaller buffer. Or the writer may have inserted one more entry, without having time to update the write pointer, so the reader may see one pending entry to little.

    But whatever you do, you must at least let the ISR send an event to the reader, so that the scheduler may perform a task-switch to pick up the received data (in case the reader have enough priority in relation to the currently active thread).

    Whatever you do, you will not manage without at least some overhad, since without any overhead, the scheduler will not be able to know if it should perform a task switch to activate the reader.

    If you have a large queue, and no timing requirements, and know that the reader will round-robin-schedule often enough to be able to poll the receive queue for data, then you can manage without informing the scheduler. But the polling of the queue is of course also a form of overhead - and requires a task switch just to let the the task poll the queue.

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  • Just sharing a traditional round-robin buffer doesn't require you to lock any scheduling or similar, as long as the processor is capable of reading and writing the head and tail pointers atomically.

    The reader is owner of one of the pointers - where to fetch data. The writer is owner of the other pointer - where to put new data.

    A task switch or interrupt in the middle of a read/modify/write will not be dangerous. The worst case is that the reader has picked up an entry without having had time to inform the writer - so the writer may sometimes see a one-entry smaller buffer. Or the writer may have inserted one more entry, without having time to update the write pointer, so the reader may see one pending entry to little.

    But whatever you do, you must at least let the ISR send an event to the reader, so that the scheduler may perform a task-switch to pick up the received data (in case the reader have enough priority in relation to the currently active thread).

    Whatever you do, you will not manage without at least some overhad, since without any overhead, the scheduler will not be able to know if it should perform a task switch to activate the reader.

    If you have a large queue, and no timing requirements, and know that the reader will round-robin-schedule often enough to be able to poll the receive queue for data, then you can manage without informing the scheduler. But the polling of the queue is of course also a form of overhead - and requires a task switch just to let the the task poll the queue.

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