Hello,
Referring to this post
http://www.keil.com/forum/59779/
Maybe it is time to remove the simulator from uv5 to prevent confusion...?
People doing gate level SoC have entirely different expectations, and are used to writing much bigger cheques for their tools, simulators and staff. They employ people that code with the expectation the design will be right the first time around when committed to ROM/Silicon.
For most embedded board designs, it is NOT that hard to mash-up development and break-out boards, that can be a close proxy for the final design.
People need to think about portability from the outset, and be able to test/validate code in a framework they build themselves that provides the level hardware independence they need. All the processing heavy stuff I work on has all the bugs and algorithm stuff beaten out of it on PC workstations. People who need to do it by single stepping their ARM code are just fools.
If your developers can't fashion workable code without the exact/specific hardware the product will ultimately use, then you need to find better people. Unfortunately the money tends to draw a lot of talentless people into the field.
Keil isn't going to be able to manage the hundreds and thousands of chip combinations that now exist. The testing/validation of the simulation just explodes exponentially.
If your developers can't fashion workable code without the exact/specific hardware the product will ultimately use, then you need to find better people. Unfortunately the money tends to draw a lot of talentless people into the field. lucky you! you evidently only work with hardware that has complete and accurate specificatins