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Simulator Logic Analyzer sampling rate

I'm using a bit outdated version of Keil uVision (4.70) because it provides simulation of peripherals for a couple of MCUs.

So, I'm using simulator for stm32f103rb and I'm using Timer 1. I want to look at TIM1->CNT register (i.e. current timer counter value).

So I added TIM1->CNT in logic analyzer. I expected to see how CNT gradually grows from 0 to maximum.
Insted I saw something similar to square wave: 0 for some time then maximum for some time. I totally wasn't expecting that.

Is that normal?
Is there any way to force logic analyzer to draw all values, or maybe timer is counting to fast?

Again, I'm using simulator, not ETM with real hardware.

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  • Hi,

    the Locic Analyzer does not sample.
    In fact the CPU's (internal) DWT Unit is used to read and send out a memory location (the variable) on each WRITE.
    This means, in the simulation you will get each change (also to the same value) of the variable reported, and on real hardware this depends on your Debugger's speed.

    When using a ULINK pro and you sample a ADC chanel with a Potentiometer (without changing it's position) in a very fast loop or an a fast timer interval, you can see the noise of the ADC in the Logic Analyzer :-)

    .
    BR,
    /th.

Reply
  • Hi,

    the Locic Analyzer does not sample.
    In fact the CPU's (internal) DWT Unit is used to read and send out a memory location (the variable) on each WRITE.
    This means, in the simulation you will get each change (also to the same value) of the variable reported, and on real hardware this depends on your Debugger's speed.

    When using a ULINK pro and you sample a ADC chanel with a Potentiometer (without changing it's position) in a very fast loop or an a fast timer interval, you can see the noise of the ADC in the Logic Analyzer :-)

    .
    BR,
    /th.

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