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Vector Table in ARM cortex M0

Mahesh M

As per some document reference that I found on net the expected vector table generated by assembler is give below

__Vectors       DCD     __initial_sp              ; Top of Stack
                DCD     Reset_Handler             ; Reset Handler
                DCD     NMI_Handler               ; NMI Handler
                [...more vectors...]


00000000   LDR   PC, =__initial_sp
00000004   LDR   PC, =Reset_Handler
00000008   LDR   PC, =NMI_Handler


but if we see actual code, it will be like

0x00000000 0268      LSLS     r0,r5,#9
0x00000002 1000      ASRS     r0,r0,#0
0x00000004 0169      LSLS     r1,r5,#5
0x00000006 0000      MOVS     r0,r0
0x00000008 0171      LSLS     r1,r6,#5
0x0000000A 0000      MOVS     r0,r0
0x0000000C 0173      LSLS     r3,r6,#5
0x0000000E 0000      MOVS     r0,r0


Any idea where will be the vector table?

Thanks

Parents
  • 0 in reply to Mahesh M

    It's really quite simple:

    On an 8051, the so-called "vector table" contains the (start of) the actual service routine;
    When an interrupt occurs, the 8051 executes the instruction that it finds in the appropriate vector table entry.

    On an ARM (and many other architectures; including x86), the vector table contains the start address of the service routine;
    When an interrupt occurs, the ARM fetches the address that it finds in the appropriate vector table entry, and then executes the instruction located at that address.

    "where can we see the vector table in actual code"

    Again, the ARM Vector table is not "actual code"; it is just a list of addresses - and (apart from the 1st entry) each of those addresses is the start address of the handler.

    "How can we register some function in Vector table"

    In 'C', the name of a function gives its address.

    "Appreciate some more document if you can suggest for reference"

    It is such a fundamental part of operation of any embedded system that any examples will have to have a Vector Table!

    Have you looked at the examples that Keil provide?

    Have you looked at the examples that the chip manufacturer provides?

    Book list available here: http://www.keil.com/books/

    Some training providers, seminars, etc, listed here:
    http://www.keil.com/events/
    http://www.keil.com/events/links.asp
    http://www.keil.com/events/classlist.asp
    http://www.keil.com/events/seminarlist.asp

Reply
  • 0 in reply to Mahesh M

    It's really quite simple:

    On an 8051, the so-called "vector table" contains the (start of) the actual service routine;
    When an interrupt occurs, the 8051 executes the instruction that it finds in the appropriate vector table entry.

    On an ARM (and many other architectures; including x86), the vector table contains the start address of the service routine;
    When an interrupt occurs, the ARM fetches the address that it finds in the appropriate vector table entry, and then executes the instruction located at that address.

    "where can we see the vector table in actual code"

    Again, the ARM Vector table is not "actual code"; it is just a list of addresses - and (apart from the 1st entry) each of those addresses is the start address of the handler.

    "How can we register some function in Vector table"

    In 'C', the name of a function gives its address.

    "Appreciate some more document if you can suggest for reference"

    It is such a fundamental part of operation of any embedded system that any examples will have to have a Vector Table!

    Have you looked at the examples that Keil provide?

    Have you looked at the examples that the chip manufacturer provides?

    Book list available here: http://www.keil.com/books/

    Some training providers, seminars, etc, listed here:
    http://www.keil.com/events/
    http://www.keil.com/events/links.asp
    http://www.keil.com/events/classlist.asp
    http://www.keil.com/events/seminarlist.asp

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