Hi
The Cortex-M3 should support unaligned data access to save RAM space without the lost of performances. Is there a possibility to enable this features for an entire project or do I have to use the __packed attribut for each data structure?
> Another thing is that a aligned write to a memory > interface of the same width is just a write. If you > have an unaligned write, then the memory controler > must do: [...]
Not with ARM processors that I am aware of. Unaligned access will be broken down into aligned accesses of smaller size.
E.g. a word access to address 0x55 will be accessing a byte at address 0x55, a half word at address 0x56 and another byte at address 0x58.
Since memory systems in ARM are required to support all access sizes, all is taken care of by byte enable. No R-M-W needed.
Regards Marcus http://www.doulos.com/arm/
Yes, the ARM line of processors has this requirement for all memory interfaces. But this only goes for the interface to the core - you will not know if the physical memory supports byte or half-word accesses or if this is done by glue logic that activates the nWAIT signal or by stretching MCLK while performing a read-modify-write.
Your example shows another important thing relevant to the ARM core and unaligned accesses. Your unaligned write resulted in three writes, since the ARM can't signal a three-byte write or an unaligned two-byte write.