From the guide, this value is related to register pressure. However, I find that some shader with high "work register" have "stack spilling = false", but some shader with low "work register" have "stack spilling = true". It does not make sense for me.
The number of work registers available is configurable (the compiler can choose; assigning more registers reduces spilling but also reduces thread occupancy so "more registers" isn't always the right choice). Compiler has heuristics to try and make a balanced choice, which a shader author cannot directly influence.
HTH, Pete
Adding to Pete's answer, our OpenCL compiler does give kernel authors the option to choose the precise register allocation using the -fregister-allocation compiler option. See https://www.khronos.org/registry/OpenCL/extensions/arm/cl_arm_scheduling_controls.html for the full specification.
Regards,
Kevin