• State Accepted Answer
  • +1 person also asked this people also asked this
  • Replies 1 reply
  • Subscribers 141 subscribers
  • Views 6319 views
  • Users 0 members are here
Options
Related
How was your experience today?

Arm cortex M3(LPC1769) MPU settings

swapnil.mishraj

Hello everyone,

I am trying to set up the MPU in my LPC1769 Xpresso board. The memory map of LPC1769 is as given below:

512kB FLASH           @ 0x0000 0000 – 0x0007 FFFF
32kB on-chip SRAM @ 0x1000 0000 – 0x1000 7FFFF

I am only configuring 2 regions.

 /* Configure region 0 to cover 512KB Flash (Normal, Non-Shared, Executable, Read-only) */

MPU->RBAR = 0x00000000 | REGION_Valid | 0;     
MPU->RASR = REGION_Enabled | NORMAL | REGION_512K | FULL_ACCESS;


/* Configure region 1 to cover CPU 32KB SRAM (Normal, Non-Shared, NonExecutable, Full Access) */
MPU->RBAR = 0x10000000 | REGION_Valid | 1;
MPU->RASR = REGION_Enabled | NOT_EXEC | NORMAL | REGION_32K|FULL_ACCESS;        //#define REGION_32K      (14 << 1)    

The problem is that I am unable to decrease the region 1(SRAM) memory from 32K to a lesser value like 1K. Whenever I try to do so it gives Memory Management fault.

What could be the reason for this?

  • +1
    Found out....this was because of the PRIVDEFENA bit being set incorrectly .Any memory access to a location not covered by any enabled
    region in MPU causes a fault if PRIVDEFNA bit is 0 and MPU is enabled. So whenever I decreased the size of MPU region 1 to less than 32 KB then the stack area region was left out of any valid region,thus causing memory management fault when stack operations occurred.