How to configure Cortex M3 endianness?

I found two statements in cortex m3 guide(red book)

1. Cortex m3 supports both Little as well as big endianness.

2. After reset endianness cannot be changed dynamically.

So indirectly it is telling change endianness settings in reset handler , is it so?

If yes then how to change endianess. Means which register I need to configure and where to configure ( in reset or in exception handler)

It is not actually good idea to change endianness But still as a curiosity I wanted to see whether cortex m3 really supports to both endianness or not?

 

I have LPC1769 microcontroller cortex m3 based so which register I need to configure to change endianess settings?

  • Hi,
    endianness is determined at the reset and it is fixed by hardware implementation. Also, it is applicable to the data accesses (i.e. load and store instructions). Instruction fetch is always done in the little-endian.
    According to LPC1769 User's Manual, LCP1769 CPU (i.e Cortex-M3) supports only the little-endian. However DMAC supports both endianness.
    Best regards,
    Yasuhiko Koumoto.