Cortex M0 internal Failure solution for ALU, CPU and Register rong results

Something looking like EEC logic on small internal blocks like the registers is likely to add more gates than the size of the logic it is trying to monitor. Given the mostly likely cause of this type of random failure is either power supply glitches or a device on the threshold of being just within tolerance, any extra logic will be impacted too, and adding more logic is statistically likely to make the problem worse not better. "Failure monitoring" only really helps when it's monitoring quite big blocks ...

Something looking like EEC logic on small internal blocks like the registers is likely to add more gates than the size of the logic it is trying to monitor. Given the mostly likely cause of this type of random failure is either power supply glitches or a device on the threshold of being just within tolerance, any extra logic will be impacted too, and adding more logic is statistically likely to make the problem worse not better. "Failure monitoring" only really helps when it's monitoring quite big blocks ...