Hi
I am playing with TrustZone as light-weight Hypervisor. My setup uses IRQ->FIQ mapping for secure interrupts but I noticed that if I disable interrupts (I bit) in the normal world also no interrupts where propagated to the secure world. So the normal world can stop the whole system.
Is this a miss-understanding of the IRQ-FIQ mapping or is it by design? (I try this on a ZYNQ).
Any insight?
Cheers,
42Bastian
If you have Secure interrupts being delivered as FIQs (GICC_CTLR.FIQEn==1), then setting the CPSR.I bit should have no effect on them. Is it possible you are setting CPSR.F as well?
Whether CPSR.F is write-able in Non-secure state is controlled by SCR.FW. You'd typically want FW==0 (CPSR.F can be modified only in Secure state) to avoid the Non-secure software being able to mask Secure interrupts.
Thanks Martin,
actually I trapped myself: The FIQ was coming, but since the IRQ kept pending (I bit set in normal world), the monitor continuously swapped between secure and normal world and the CPU never did anything useful any more.
Now I detect a stuck normal-world and disable all NS-interrupts. (I thought switching of DISTRIBUTOR for normal world would be sufficient, but seems not).