Hello,
I am working on a Cypress MCU (CY8C3866AXI-040), and I have a problem about I2C. I'm trying to create an I2C communication with an external EEPROM (and an external Cypress FerroRAM too). I have already watched all the default example codes of Cypress about I2C. In the following code, I send 8 byte to the FRAM, then try to request these bytes from it. All 3 commands seems to be succeeded, because I got master status 0. But I can't see the result. The read buffer remains its original content. What is wrong in my code?(The hardware set up and the I2C configuration (in the top design: UDB, internal clock source, 100 kbps) are OK)
Thanks
#define I2C_DATA_CNT 8u #define I2C_WR 0u #define I2C_RD 1u uint8 mr_status = 0; uint8 dev_sel = 0xA0; // 1010 00 0 0 uint8 location[2] = {0x00, 0x00}; uint8 wr_buffer[I2C_DATA_CNT+2] = {0x00, 0x00, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B}; uint8 rd_buffer[I2C_DATA_CNT] = {0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87}; I2C_1_Start(); UART_1_Start(); while(1) { if(UART_1_RX_STS_FIFO_NOTEMPTY) { // Input character rx_buffer = UART_1_GetChar(); if(rx_buffer == 0x77) { // typing 'w': write dev_sel = 0xA0; mr_status = I2C_1_MasterWriteBuf(dev_sel, (uint8*) wr_buffer, sizeof(wr_buffer)+sizeof(location), I2C_1_MODE_COMPLETE_XFER); while(!(I2C_1_MasterStatus() & I2C_1_MSTAT_WR_CMPLT)); CyDelay(10); putByteUART(mr_status); // just puts the byte, 0 means ok I2C_1_MasterClearStatus(); } else if(rx_buffer == 0x72) { // 'r' read // In order to do a read from a specific address, do a write operation with the memory address bytes alone: dev_sel = 0xA0; mr_status = I2C_1_MasterWriteBuf(dev_sel, (uint8*)location, sizeof(location), I2C_1_MODE_NO_STOP); while(!(I2C_1_MasterStatus() & I2C_1_MSTAT_WR_CMPLT)); CyDelay(10); putByteUART(mr_status); dev_sel = 0xA1; mr_status = I2C_1_MasterReadBuf(dev_sel, (uint8*)rd_buffer, sizeof(rd_buffer), I2C_1_MODE_REPEAT_START); // mr_status = I2C_1_MasterReadBuf(dev_sel, (uint8*)rd_buffer, 8, I2C_1_MODE_REPEAT_START); while(!(I2C_1_MasterStatus() & I2C_1_MSTAT_RD_CMPLT)); //Wait till the master completes writing CyDelay(10); putByteUART(mr_status); putByteUART(rd_buffer[0]); // unfortunately the this byte remains 0x80 UART_1_PutString(" "); putByteUART(rd_buffer[1]); // 0x81 instead of 0x65, this is the problem } } }
I have already seen good answers for Cypress codes. Anyone else?
The point being that the best place to find people who know about the specifics of the Cypress PSoC - ie, the best place to get answers to your question - will be in the Cypress PSoC forums.
The Cypress PSoC3 in an 8051 architecture chip, so it's fully outside of scope here.The PSoC4 through PSoC6 have ARM cores, so some questions about them might be appropriate.