Hi,
I tested SGI interrupt latency, it seems that GIC3.0's SGI interrupt latency are much bigger than GIC2.0.
How to test:
GIC3.0:
1. read timestamp(t01)
2. core0 write ICC_SGI0R_EL1 to trigger core1, read timestamp(t02)
3. isr in core1, read timestamp(t03)
GIC2.0:
1. read timestamp(t11)
2. core0 write GICD_SGIR to trigger core1, read timestamp(t12)
3. isr in core1, read timestamp(t13)
Result is (had think about the time of reading timestamp):
1. (t02 - t01) nearly 3 times bigger than (t12 - t11) which means system register cost more time than access to memory mapped memory.
2. (t03 - t02) nearly 2 times bigger than (t13 - t12) which means interrupt latency of GIC3.0 are much bigger than GIC 2.0
Is this normal? Any help will be appreciated! Thanks!
BR,
Peng
Hi all,
As we know, GIC 3.0 and GIC 2.0 has different interrupt routing method.
I am curious that whether ARM tested these comparison.
Thanks!