Hello everyone,
May I can ask you something if anyone knows,
Is there on ARM processors a similar function like VMCSs to save and load CPU states and registers in memory?
I am reading about VMCSs and I am trying to find out what is the similarity of this on ARM CPU architecture and precisely on ARMv8.
Many thanks!
Hi Ab,
There isn't - control structures for saving and restoring the state of guest OS registers, Hypervisor traps and so on are free-form on ARMv8 in the sense that if you write software to store this information in whatever format you like, you can load it back into the system however you like. What VMCS gives you is a way of defining a ~4K block of RAM which contains, for each virtual machine that could be invoked at any time, what gets loaded into the processor context, purely as a function of hardware. To swap between OS #1 and OS #2, entry into a Hypervisor exception level or privilege level through some dispatcher function is required. As far as I understand it this entry/exit isn't required on VT due to the VMCS structures, whenever OS #2 needs to run and OS #1 is running, that invocation and context swap is done for you.
Since ARM is a RISC architecture it tends to do less work in hardware and delegate it to software. Note that ARMv8-A/R don't automatically push or pop registers to/from the stack on exception handling, either (ARMv8-M does, but this is a different use case).
Ta,
Matt