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Issue FIQ pending arm trusted firmware

armdev

Hi,

I am running arm-trusted-firmware on Juno and when I breakthrough DS-5 on EL3 level I see FIQ pending status in ISR_EL1.

I am trying to bring-up linux guest OS and when I try to run linux image I am entering virtual FIQ handler at EL2 level.

Please let me know if there is any way I can ignore this FIQ pending ?

I tried using GICC_CTLR and GICV_CTLR registers bit 0 to disable Group0 (FIQs) interrupts but it is not helping.

Thanks,

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    Hi armdev,

    What exactly did you set in the GICC_CTLR? The FIQ disable is a little more complicated than just disabling the Group 0 interrupts. Actually, what disabling Group 0 interrupts probably does for you with a pre-configured GIC is end up in bypass mode, so something is asserting the FIQ line directly to the core (or it's floating somehow). There is a way to disable it, though, which is documented in the GICv2 Architecture Specification section 2.3.x. There are some nice tables

    We'll need a bit more information to figure out what exactly you're seeing here to figure out what's actually happening.

    Ta,

    Matt

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  • 0

    Hi armdev,

    What exactly did you set in the GICC_CTLR? The FIQ disable is a little more complicated than just disabling the Group 0 interrupts. Actually, what disabling Group 0 interrupts probably does for you with a pre-configured GIC is end up in bypass mode, so something is asserting the FIQ line directly to the core (or it's floating somehow). There is a way to disable it, though, which is documented in the GICv2 Architecture Specification section 2.3.x. There are some nice tables

    We'll need a bit more information to figure out what exactly you're seeing here to figure out what's actually happening.

    Ta,

    Matt

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