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how to bypass BL3-1 arm-trusted-firmware running on Juno

armdev

Hi,

I am trying to take control at EL3 level and want to run my code on Juno. I am using arm-trusted-firmware package running on Juno.

In order to achieve this I am using DS-5 debugger to breakthrough the code and setting the PC to my code but instead of executing next instruction it is jumping back to some 0x400_F000 address.

I am not sure how I can achieve this ? What i simply want is to take control at EL3 level and execute my code. I believe it is possible at BL3-1 level, is it correct ?

I found example for bare-metal applications but the control transfer is happening at EL1-NS mode whereas I need EL3 level control.

Thanks,

Parents
  • 0 in reply to Matt Sealey

    Hi Matt,

    I am facing another issue with this approach where I see one FIQ is always pending and this causes issues when I run my Guest OS.

    I tried masking FIQs at different levels but ISR_EL1 always shows FIQ interrupt pending.

    It seems that FIQ is already distributed to core when I switch mode.

    Is there any way when I take control at EL2 and move to EL3 but I don't have any FIQs pending ?

    I also tried following the newly posted tutorial but the commands doesn't work for me so I have added my errors in "comments" section

    http://community.arm.com/docs/DOC-10206#comment-14854

    I am not sure if last command with AXI and masking interrupts is doing the same ?

    Please let me know if there is any way to achieve this ?

    Thanks.

Reply
  • 0 in reply to Matt Sealey

    Hi Matt,

    I am facing another issue with this approach where I see one FIQ is always pending and this causes issues when I run my Guest OS.

    I tried masking FIQs at different levels but ISR_EL1 always shows FIQ interrupt pending.

    It seems that FIQ is already distributed to core when I switch mode.

    Is there any way when I take control at EL2 and move to EL3 but I don't have any FIQs pending ?

    I also tried following the newly posted tutorial but the commands doesn't work for me so I have added my errors in "comments" section

    http://community.arm.com/docs/DOC-10206#comment-14854

    I am not sure if last command with AXI and masking interrupts is doing the same ?

    Please let me know if there is any way to achieve this ?

    Thanks.

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