Enabling Software Generated Interrupts (GICv2)

Hello All,

We are trying to enable/generate software generated interrupts in ZCU102. We are using following sequence to write to the GIC Registers -

   Read(0xF9020000)  -- Reading GICC_CTLR gives the value as    0x00000001
   Read(0xF9010004 )  -- Reading GICD_TYPER gives the value as    0x00000065 
  • Write (0xF9010000 , 0x00000003 ) // GICD_CTLR Register

  • Read (0xF9010000 )

  • Write (0xF9010084 , 0x00000001) // GICD_IGROUPR1 Register

  • Read (0xF9010084 )

  • Read(0xF9010100 ) // GICD_ISENABLER0 Register

  • Write(0xF9010F00 , 0x00010000) //GICD_SGIR Register

  • Read(0xF9010F00 )

Commands we used writing and reading to the registers-

  • out32 0xF9010000 0x00000003 // writing value - 0x00000003 to GICD_CTLR register with address 0xF9010000
  • in32 0xF9010000 // Reading value from address 0xF9010000
  • out32 0xF9010084 0x00000001
  • in32 0xF9010084
  • in32 0xF9010100
  • out32 0xF9010F00 0x00010000
  • in32 0xF9010F00

But we are not able to set the SGIR Register which gives "0" when read after writing in the above sequence. Could you please suggest the possible reason why we are not able to set the SGIR Register or something we are missing in the sequence.