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LD Scripts is the best approach for BitBanding with GCC?

Carlos Delfino

I have searched information on Bit-Banding in Cortex-M3 and M4 with the GNU GCC ARM EABI NONE, I have seen basic examples on the internet but none works with GNU GCC also seems that no intention to have such feature implemented.

Can someone tell me if the LD via memory remapping really work? the best approach?

What is the best way?

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  • 0 in reply to Liviu Ionescu

    This is a guess only, but I think carlosdelfino is teaching the students that if you need to set or clear a single bit, you can use a single write-cycle instead of read+modify+write cycle (3 or 4 clock cycles).

    On AVR, it's necessary to read, then use either AND or OR and then write back the modified value.

    That has a terrible disadvantage on the AVR. If you write to a port from an interrupt and you want to change a single bit from task-time, you risk that the interrupt will run in the middle of your read-modify-write cycle, which means that the values your interrupt writes will be available on the port for only a short time, then it's quickly changed back to what it was by your task-time.

    To fix that, you can disable interrupts and re-enable them after updating the port at task-time (now 5 clock cycles were used instead of only 1 on ARM).

    So one topic is the atomic access, the other topic is saving CPU-time on accessing the same port from both interrupt code and task-time code.

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  • 0 in reply to Liviu Ionescu

    This is a guess only, but I think carlosdelfino is teaching the students that if you need to set or clear a single bit, you can use a single write-cycle instead of read+modify+write cycle (3 or 4 clock cycles).

    On AVR, it's necessary to read, then use either AND or OR and then write back the modified value.

    That has a terrible disadvantage on the AVR. If you write to a port from an interrupt and you want to change a single bit from task-time, you risk that the interrupt will run in the middle of your read-modify-write cycle, which means that the values your interrupt writes will be available on the port for only a short time, then it's quickly changed back to what it was by your task-time.

    To fix that, you can disable interrupts and re-enable them after updating the port at task-time (now 5 clock cycles were used instead of only 1 on ARM).

    So one topic is the atomic access, the other topic is saving CPU-time on accessing the same port from both interrupt code and task-time code.

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