前辈们，这是我截取ARM体系结构与编程中的内容。我的问题是。 指令编码的24位，IA是后增的，那么它的基址寄存器是会放入数据的，为啥24位是0，现在Rn所指的内存单元用上了啊，那不应该是包含在指令使用的内存块中额，地址寄存器所指的内存单元包含在指令所使用的代码块中啊
Hello yzilong,
I am sorry but I had made a wrong answer.I have re-written the previous answer.As the ARM ARM says, the meaning of 'P' should be considered with 'U'.The following descriptions are derived from ARM ARM (DDI 0100I) A5.4.1.
The P bit Has two meanings:P==0 indicates that the word addressed by Rn is included in the range of memory locations accessed, lying at the top (U==0) or bottom (U==1) of that range.P==1 indicates that the word addressed by Rn is excluded from the range of memory locations accessed, and lies one word beyond the top of the range (U==0) or one word below the bottom of the range (U==1).
The U bit Indicates that the transfer is made upwards (U==1) or downwards (U==0) from the base register.
The below shows how to define the start address.First of all, the transaction direction is always from the lower to the higher of the memory address space.If STM/LDM have M registers in the register list and Rn is the base register, then the start address of the trabsaction is defined as the following.
<Start_Address> = switch ( {P, U} ){ case 00: Rn - (4*M) +4 /* DA */ case 01: Rn /* IA */ case 10: Rn - (4*M) /* DB */ case 11: Rn + 4 /* IB */ };
<Rn of execution end> = (W==0)? Rn : switch ( {P, U} ){ case 00: Rn - (4*M) /* DA */ case 01: Rn + (4*M) /* IA */ case 10: Rn - (4*M) /* DB */ case 11: Rn + (4*M) /* IB */ };
Best regards,
Yasuhiko Koumoto.