Hi ARM专家们，有几个问题请教一下：
1、PoC是所有Agents能看到同一个memory copy的点，通常是external memory；CCN-5xx HN-F中实现了PoC，
用于管理RN-Fs间的coherency，假如CPU发出带PoC属性的cache maintenance操作，是否可以maintenance L3？
2、如果CPU发出的是带PoU但是带Inner-Shareable属性的cache maintenance操作，此时是否会maintenance L3？
因为CPU接口规定，如果是BROADCASTINNER=1，则BROADCASTOUTER也必须是1。
3、CCN-5xx L3中特别注明指令是pseudo-inclusive，这个与inclusive差别在哪呢？
4、DEN0024A_v8_architecture_PG.pdf文档p214，Table 14-1中，用Set/Way来maintenance cache不带Broadcast
可以理解，但为啥DC IVAC, Xt是一定Broadcast，而DC CVAC, Xt仅是Maybe Broadcast？
Hi Steven,
>CCN-5XX中的L3在软件上如何做整体的flush？
You can do the following:
(1) Ensure there are no outstanding transactions.
(2) Write to hn_cfg_pstate_req[1:0] = 0b01 (HNF_PM_SFONLY) in each HN-F.
The hardware would handle the flushing of the L3 cache.
(3) Poll hn_cfg_pstate_status[3:0] in each HN-F until they are all in the HNF_PM_SFONLY state.
After step (3), the L3 cache will be disabled. If you want to enable it again, you should write to hn_cfg_pstate_req[1:0] = 0b11 (HNF_PM_FULL) and poll hn_cfg_pstate_status[3:0] in each HN-F until they are all in the HNF_PM_FULL state.
Regards,
Xingguang
感谢 xingguang的答复！