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hello!我有个问题关于ARM Artisan UMC28nm L28HPCP memory power management。在手册中介绍了power up和power down的sequence,规定了VDDCE和VDDPE的上电和下电顺序。在标准power up的过程中,是不是一定要VDDCE早上电于VDDPE?我们现在设计是把VDDCE和VDDPE接到一起的,这种设计有没有问题? 另外,这个手册的Table1-3中,前三行VDDPE列中写的VDDCE,这个是否有误?
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hello!我有个问题关于ARM Artisan UMC28nm L28HPCP memory power management。在手册中介绍了power up和power down的sequence,规定了VDDCE和VDDPE的上电和下电顺序。在标准power up的过程中,是不是一定要VDDCE早上电于VDDPE?我们现在设计是把VDDCE和VDDPE接到一起的,这种设计有没有问题? 另外,这个手册的Table1-3中,前三行VDDPE列中写的VDDCE,这个是否有误?
zhenjiao
over 2 years ago
ARM Artisan UMC28nm L28HPCP memory power managem
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baopeng
over 2 years ago
我们是40nm的,同样的问题。希望解答。
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baopeng
over 2 years ago
我们是40nm的,同样的问题。希望解答。
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