有没有关于ARMv8-M和ARMv7-M区别的说明？

ARMv8-M Mainline enhancements (relative to ARMv7-M) include:

• Load acquire, store release instructions (C11 atomic variable handling)

• Floating point extension architecture v5 (Cortex-M4 processor is based on FPv4)

• New instructions for TrustZone technology support

• New style MPU programmer’s model - using the Protected Memory System Architecture (PMSA) v8 – enabling improved flexibility in MPU region definition

• Better debug capability – enhancements in breakpoint and watchpoint units.

These architectural enhancements enable better software design in a number of ways. For example, under PMSAv8 the new MPU programmer’s model removed some of the previous restrictions in the definition of MPU memory regions. For example, the MPU in ARMv6-M / ARMv7-M requires that an MPU memory region starts from an address which is a multiple of the region size, and the region size must be a power of two. Thus, when creating a memory region from an address 0x3BC00 to 0x80400, multiple MPU region registers are required

Comparing ARMv8-M Baseline to ARMv6-M architecture, there are a number of new instructions taken from ARMv7-M:

/cfs-file/__key/communityserver-discussions-components-files/7/Whitepaper-_2D00_-ARMv8_2D00_M-Architecture-Technical-Overview.pdf 

ARMv8-M Mainline enhancements (relative to ARMv7-M) include:

• Load acquire, store release instructions (C11 atomic variable handling)

• Floating point extension architecture v5 (Cortex-M4 processor is based on FPv4)

• New instructions for TrustZone technology support

• New style MPU programmer’s model - using the Protected Memory System Architecture (PMSA) v8 – enabling improved flexibility in MPU region definition

• Better debug capability – enhancements in breakpoint and watchpoint units.

These architectural enhancements enable better software design in a number of ways. For example, under PMSAv8 the new MPU programmer’s model removed some of the previous restrictions in the definition of MPU memory regions. For example, the MPU in ARMv6-M / ARMv7-M requires that an MPU memory region starts from an address which is a multiple of the region size, and the region size must be a power of two. Thus, when creating a memory region from an address 0x3BC00 to 0x80400, multiple MPU region registers are required

Comparing ARMv8-M Baseline to ARMv6-M architecture, there are a number of new instructions taken from ARMv7-M:

/cfs-file/__key/communityserver-discussions-components-files/7/Whitepaper-_2D00_-ARMv8_2D00_M-Architecture-Technical-Overview.pdf