• Locked Locked
  • Replies 5 replies
  • Subscribers 119 subscribers
  • Views 10463 views
  • Users 0 members are here
2025 survey

We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.

Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Does the NVIC really do interrupt nesting?

Konstantin Dimitrov
Note: This was originally posted on 23rd February 2011 at http://forums.arm.com

For days I've been banging my head with a problem that shouldn't take more than a minute time otherwise. How to get the NVIC of Cortex M3 handle the simplest in the world interrupt nesting - an interrupt within interrupt.
In details - I have the SysTick running that executes my handling function. What I am trying to achieve is to re-enable the SysTick interrupt and let the same function be executed should another SysTick has occured while it was still serving the previous one. With the old "dumb" ARM7's VIC that was the easiest thing to do - just enabling the interrupts again once I've entered my function. But with this "advanced" one, a person apparently has to go through some tricks to get the job done.
Any help would be warmly welcome!
Thanks
Parents
  • Note: This was originally posted on 24th February 2011 at http://forums.arm.com


    I am porting my own in-house RTOS kernel that uses task scheduling based on stacking.

    I see. Do you have any reference where this mechanism might be explained? Perhaps it could be implemented on Cortex-M3 without having to remain in the ISR.

    Simply changing (lowering in your case) the current execution priority in Cortex-M3 can only drop down to the priority of the highest priority preempted exception. So that wouldn't work in your situation I am afraid.


    It has been working great for years on the old ARM7 machines

    Since then you may have forgotten how painful it was to get nested/reentrant interrupts working on ARM7 in the first place :-)


    The whole story develops around the fact I can execute the stack from within itself with the currently pending tasks. I take care myself about the stack overflow but I simply need the ability to re-enable the same interrupt and let it be served while I am still in it.

    Sounds interesting but also scary. Again, would you have any references?

    Regards
    Marcus
Reply
  • Note: This was originally posted on 24th February 2011 at http://forums.arm.com


    I am porting my own in-house RTOS kernel that uses task scheduling based on stacking.

    I see. Do you have any reference where this mechanism might be explained? Perhaps it could be implemented on Cortex-M3 without having to remain in the ISR.

    Simply changing (lowering in your case) the current execution priority in Cortex-M3 can only drop down to the priority of the highest priority preempted exception. So that wouldn't work in your situation I am afraid.


    It has been working great for years on the old ARM7 machines

    Since then you may have forgotten how painful it was to get nested/reentrant interrupts working on ARM7 in the first place :-)


    The whole story develops around the fact I can execute the stack from within itself with the currently pending tasks. I take care myself about the stack overflow but I simply need the ability to re-enable the same interrupt and let it be served while I am still in it.

    Sounds interesting but also scary. Again, would you have any references?

    Regards
    Marcus
Children
No data