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Fast Models: Best way to model ROMPatch like feature

Hi,

I am looking for a good way to model a ROMPatch-like function on pvbus. This implementation should monitor the bus for return the data from its own registers if the address matches (instead of returning from the end slave device, say a RAMDevice). Otherwise, it will let the transaction through to the intended slave.

From the documents, it seems that the best way to achieve this is to have a piece of bus fabric (a slave device) that intercepts the all transaction. It will re-issue a identical transaction to the intended slave it the matching fails. Otherwise, it will return the "patch" value from its own register to the original master. This, however, will significantly impacts the simulation performance.

Is there another way to achieve this without significantly compromising the performance? Any ideas will be great! Thanks.

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  • Hi,

    It's not difficult to build such a bridge to intercept the bus transactions. I would recommend using SystemC TLM-2.0.

    Do you need to intercept memory ranges containing code which is executing using DMI (direct memory interface)? Disabling DMI will drastically reduce performance.

    If this is for a range of memory which is for peripherals or less frequently accessed data memory which is not the main memory for code execution then performance will still be good and code can still execute with DMI on.

    Thanks,

    Jason

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  • Hi,

    It's not difficult to build such a bridge to intercept the bus transactions. I would recommend using SystemC TLM-2.0.

    Do you need to intercept memory ranges containing code which is executing using DMI (direct memory interface)? Disabling DMI will drastically reduce performance.

    If this is for a range of memory which is for peripherals or less frequently accessed data memory which is not the main memory for code execution then performance will still be good and code can still execute with DMI on.

    Thanks,

    Jason

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