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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3582 Questions
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  • Answered

    When will the Cortex-M1 be updated to work with Xilinx tools newer than 2019? 0

    2070 views
    1 reply
    Latest over 4 years ago
    by Roger W. Cover
  • Answered

    Can arm hardware be built by serious hobbyist? 0

    • Development Boards
    4463 views
    4 replies
    Latest over 4 years ago
    by WestfW
  • Not Answered

    CLZ 0

    1389 views
    1 reply
    Latest over 4 years ago
    by 42Bastian Schick
  • Suggested Answer

    Reset problem with stm32f4 0

    3371 views
    1 reply
    Latest over 4 years ago
    by Andy Neil
  • Not Answered

    BX to non secure code region in the secure world 0

    • TrustZone for Armv8-M
    • Armv8-M
    • CoreSight Embedded Trace Macrocell for Cortex-M33
    1244 views
    0 replies
    Started over 4 years ago
    by dnjsdnwja
  • Not Answered

    Intel Last Branch Recording (LBR) feature on ARM 0

    • Hardware Platforms
    4434 views
    4 replies
    Latest over 4 years ago
    by Hart451
  • Answered

    Non Secure malicious access handling... 0

    3541 views
    4 replies
    Latest over 4 years ago
    by TexCorJC
  • Not Answered

    VMSAv8-64 Stage 2 address translation -- PA size forces use of concatenated translation tables 0

    • virtualization
    • Armv8-A
    • Memory Management Unit (MMU)
    3493 views
    0 replies
    Started over 4 years ago
    by Olivier Delande
  • Not Answered

    Potential limitations for MPU regions attributes? 0

    7138 views
    17 replies
    Latest over 4 years ago
    by Antoine C
  • Not Answered

    SWD cannot read/write MEM-AP 0

    2352 views
    3 replies
    Latest over 4 years ago
    by Andy Neil
  • Not Answered

    T 0

    1690 views
    3 replies
    Latest over 4 years ago
    by Andy Neil
  • Not Answered

    Benchmark CMSIS-DSP 0

    1512 views
    0 replies
    Started over 4 years ago
    by sirio771
  • Answered

    Is preemption possible after state change to non-secure using BLXNS? 0

    • TrustZone for Armv8-M
    • Cortex-M33
    • Armv8-M
    1808 views
    1 reply
    Latest over 4 years ago
    by Uma Ramalingam Arm Employee Badge
  • Not Answered

    Some basic question about Juno R2 0

    2595 views
    0 replies
    Started over 4 years ago
    by Chris Jin
  • Answered

    Would and How arm/trustfirmware take care of cache coherence in trustzone technology? 0

    15330 views
    3 replies
    Latest over 4 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Answered

    MPU enabling triggers hard fault 0

    3556 views
    1 reply
    Latest over 4 years ago
    by Robert McNamara
  • Not Answered

    Cortex-M55 + Helium dev/eval board 0

    • Cortex-M55
    • Helium
    • Development Boards
    • Evaluation Boards
    1459 views
    0 replies
    Started over 4 years ago
    by Yevhenii
  • Answered

    Is there an xml version of the official manual document of the Armv8.1-M architecture? 0

    • Armv8.1-M
    2716 views
    5 replies
    Latest over 4 years ago
    by hoth
  • Answered

    cpsid from non-secure triggers SecureFault 0

    • ARMv8 Exception Model
    • CoreLink SSE-200 Subsystem
    • TrustZone
    4700 views
    3 replies
    Latest over 4 years ago
    by 42Bastian Schick
  • Not Answered

    Link (?) problem using pre-built cross-compiler 0

    8298 views
    15 replies
    Latest over 4 years ago
    by smblackledge
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