need arm cortex a7 kernel level optimization methods.
Can we access physical memory directly ?
Do we need to disable MMU to access physical memory ? will caches be available if MMU disabled?
Not enough info: Which Kernel? Windows, macOS, Linux, BSD, Fuchsia, RTOS?
123@123 said:will caches be available if MMU disabled?
Please read the Cortex-A reference manual.
faced similar problem..
Help !!
mcdvoice