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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3594 Questions
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  • Answered

    Does load/store-exclusive violate Hypervisor Transparency? 0

    • Armv7-A
    • Armv8-A
    4805 views
    1 reply
    Latest over 10 years ago
    by Matt Sealey Arm Employee Badge
  • Not Answered

    NEON-Advanced SIMD vs. SIMD 0

    • Armv6-A
    • NEON
    • Cortex-A
    15737 views
    5 replies
    Latest over 10 years ago
    by daith
  • Answered

    NEON SIMD Register Diagram 0

    • NEON
    • Cortex-A
    5708 views
    1 reply
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    The reason why the exception frame forms on PSP? 0

    • Cortex-A
    • Cortex-M
    12061 views
    15 replies
    Latest over 10 years ago
    by daith
  • Answered

    How to enable Neon in cortex A8? +1

    • NEON
    • Cortex-A
    • Cortex-A8
    13913 views
    9 replies
    Latest over 10 years ago
    by daith
  • Answered

    What is the effect of LDR r0, [r5, r6, LSL r2] 0

    • 32-bit
    8960 views
    2 replies
    Latest over 10 years ago
    by Phil Greco
  • Answered

    How many times same interrupt can be in pending state at a time? (In ARM CM-3) 0

    • Cortex-M3
    • Cortex-M
    4376 views
    2 replies
    Latest over 10 years ago
    by Jens Bauer
  • Answered

    why Interrupt 1023 (Spurious interrupt) happens when i set pagetable attribute on exynos5250? +1

    • Cortex-A15
    • Cache
    • Cortex-A
    • TrustZone
    7356 views
    6 replies
    Latest over 10 years ago
    by Yeo Reum Yun
  • Not Answered

    Continue the Target using Serial Wire Debug Protocol 0

    • Cortex-M3
    • Cortex-M
    5345 views
    8 replies
    Latest over 10 years ago
    by harshan
  • Answered

    How to learn ARM +1

    • Cortex-M3
    • Cortex-A
    • Cortex-A7
    • Cortex-M
    6180 views
    3 replies
    Latest over 10 years ago
    by Mohamed Saleh
  • Answered

    Question about accumulator word length in A8 core 0

    • NEON
    • Cortex-A
    • Cortex-A8
    6240 views
    3 replies
    Latest over 10 years ago
    by daith
  • Answered

    Memory barrier (DSB, DMB). Does they guarantee writing data on cache to memory? 0

    • Armv7-A
    • Cache
    • Armv8-A
    • NEON
    • Cortex-A
    • TrustZone
    17571 views
    9 replies
    Latest over 10 years ago
    by Ash Wilding Arm Employee Badge
  • Answered

    Get current active interrupt priority +1

    • Cortex-M3
    • Cortex-M
    • C
    • Cortex-M4
    11084 views
    2 replies
    Latest over 10 years ago
    by Jonathan Weber
  • Answered

    LDRT and rrx'd operand 0

    • Cortex-A
    • Cortex-A7
    3871 views
    3 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Answered

    Funny asymmetry with banked register names 0

    • Armv7-A
    • Cortex-A
    • Cortex-A7
    6817 views
    5 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Answered

    Does CCI-400 guarantees cache coherency between secure and non-secure worlds? 0

    • Cortex-A53
    • Cortex-A57
    • big.LITTLE
    • CoreLink CCI-400
    • Cache
    • Cortex-A
    5398 views
    3 replies
    Latest over 10 years ago
    by Kay
  • Not Answered

    ARM Context ID Register & Process Context Switch 0

    • Armv7-A
    • Cortex-A9
    • Cortex-A
    • Cortex-A8
    17671 views
    10 replies
    Latest over 10 years ago
    by onion
  • Answered

    Reordering between multiple loads 0

    • Cache
    • Cortex-A
    • Cortex-A8
    7852 views
    7 replies
    Latest over 10 years ago
    by Hemant
  • Answered

    How can we boot linux kernel in ARM FVP w/ TrustZone? 0

    • Cortex-A9
    • Cortex-A
    • TrustZone
    • Linux
    8713 views
    4 replies
    Latest over 10 years ago
    by Yoshiharu Imamoto
  • Not Answered

    Is First-level table skippable? (VMSA) 0

    • Cortex-A17
    • AArch64
    • Cortex-A15
    • Cortex-A
    • Cortex-A7
    • AArch32
    8056 views
    4 replies
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
<>
Topics being discussed in this forum
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