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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3618 Questions
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  • Not Answered

    Cache issue in A53 cores 0

    1308 views
    1 reply
    Latest over 2 years ago
    by Zhifei Yang Arm Employee Badge
  • Suggested Answer

    Corxtex-R52: Inquiry about the default memory map 0

    • Cortex-R52
    1415 views
    2 replies
    Latest over 2 years ago
    by Martin Weidmann Arm Employee Badge
  • Suggested Answer

    Does Sc000 supports TrustZone? 0

    1605 views
    3 replies
    Latest over 2 years ago
    by kron
  • Suggested Answer

    M7 vs. M3 FIR filter Performance 0

    1969 views
    4 replies
    Latest over 2 years ago
    by Wolfgang S.
  • Answered

    How to control DBGEN signal using source code 0

    • Cortex-R
    • Arm7
    • 12 (Debug Monitor)
    • Cortex-A
    • Debugger
    2743 views
    3 replies
    Latest over 2 years ago
    by Ronan Synnott Arm Employee Badge
  • Not Answered

    About Arm v9 Neon Instruction cycle info 0

    • SIMD and Vector Processing Instructions
    1148 views
    1 reply
    Latest over 2 years ago
    by Annie
  • Suggested Answer

    Looking for a way to determine if software libraries are used for floating point computation 0

    • Floating Point
    • Cortex-M4
    1275 views
    2 replies
    Latest over 2 years ago
    by TKL
  • Not Answered

    PMU Event logging overhead on Cortex R4 CPU 0

    • performance
    • Cortex-R4
    1141 views
    1 reply
    Latest over 2 years ago
    by Latonya Dodson
  • Not Answered

    Running armv8 binaries on armv9 target 0

    1418 views
    1 reply
    Latest over 2 years ago
    by Peter Harris Arm Employee Badge
  • Suggested Answer

    Transpose operations in helium(CM85) compared to neon 0

    1356 views
    3 replies
    Latest over 2 years ago
    by Ronan Synnott Arm Employee Badge
  • Not Answered

    cortex M7: How to enable watchpoints 0

    1788 views
    1 reply
    Latest over 2 years ago
    by BookerE1
  • Not Answered

    Issue with Running Two Separate Codes on Intel Cyclone V SoC ARM Cortex A9 Dual Core via QSPI 0

    • System on Chip (SoC)
    • Cortex-A9
    • Baremetal
    1149 views
    1 reply
    Latest over 2 years ago
    by ArmDev-support
  • Answered

    neon hard and soft float differences 0

    • NEON
    • Floating Point
    2242 views
    2 replies
    Latest over 2 years ago
    by paulf
  • Not Answered

    Assistance Needed: Trouble Running Bare-Metal Code on second core Cyclone 5 HPS 0

    • Arm7
    • Cortex-A
    • Processors
    • Debugger
    • Baremetal
    1481 views
    2 replies
    Latest over 2 years ago
    by ArmDev-support
  • Answered

    GIC Interrupt handling in Linux 0

    4302 views
    2 replies
    Latest over 2 years ago
    by Martin Weidmann Arm Employee Badge
  • Not Answered

    Master slave connection for BP210 0

    1193 views
    2 replies
    Latest over 2 years ago
    by Colin Campbell Arm Employee Badge
  • Answered

    compliance test for arm M4 for post silicon +1

    788 views
    1 reply
    Latest over 2 years ago
    by Ronan Synnott Arm Employee Badge
  • Answered

    GIC Interrupt handling 0

    3986 views
    4 replies
    Latest over 2 years ago
    by ChanelRogahn
  • Not Answered

    Cortex-M4F: Crash when using FPU and math with literal 0

    • Cortex-M4
    1411 views
    1 reply
    Latest over 2 years ago
    by Hans Schneebauer Arm Employee Badge
  • Answered

    Read memory block loaded by bootloader at EL3, but on EL2 0

    • Cortex-A53
    • AArch64
    • virtualization
    • Armv8-A
    • Embedded Hypervisor
    • Memory Management Unit (MMU)
    3841 views
    8 replies
    Latest over 2 years ago
    by pcarmo
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