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How to evaluate DSU performance

Hi,

I want to evaluate the DSU performance with the configuration i have selected. What is the good way to start. eventually i would like to measure How many cycles each application (includes benchmark applications and my own) is taking with different configurations BEFORE simulating on RTL or FPGA emulation. 

I am thinking of tools from ARM which can be used to create SoC with ARM models.

Is there any tool from ARM which can be used to evaluate at core/system level performance?

Does ARM provide any C or system C models of DSU/Core they deliver?
At system level does ARM provide CMN700 model?

Does ARM provide fast functional and cycle accurate models?

Thanks,

Veerender

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  • Hi Ronan Synnott, thanks for information sharing.Does ARM also supporting tools to evaluate DSU for benchmarking applications? for example I want to check my L3 or L2 of each core inside the DSU is configured sufficiently good based on existing benchmark applications?
    this requires all OS/SW support.  Is there a way to evaluate this kind of stuff before start testing on RTL/FPGA?

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  • Hi Ronan Synnott, thanks for information sharing.Does ARM also supporting tools to evaluate DSU for benchmarking applications? for example I want to check my L3 or L2 of each core inside the DSU is configured sufficiently good based on existing benchmark applications?
    this requires all OS/SW support.  Is there a way to evaluate this kind of stuff before start testing on RTL/FPGA?

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