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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3594 Questions
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  • Answered

    why some instructions are not required to be  explicitly synchronized ? +1

    • Armv8
    4628 views
    2 replies
    Latest over 9 years ago
    by shengyu shen
  • Answered

    PSP Stack Pointer, what memory address does it point to? 0

    • Cortex-M
    • Cortex-M4
    17012 views
    5 replies
    Latest over 9 years ago
    by Murtuza Quaizar
  • Answered

    How to get the secure(or non-secure) state on Cortex-A53? 0

    • Cortex-A53
    • Armv8
    • Cortex-A
    7968 views
    3 replies
    Latest over 9 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    AMBA AHB5 : Stable Between Clock Question +1

    • AMBA
    • AMBA 5
    • AHB
    6467 views
    3 replies
    Latest over 9 years ago
    by Colin Campbell Arm Employee Badge
  • Answered

    Memory controller for AHB, dual (or multi) channel +1

    • AXI
    • AHB
    5538 views
    3 replies
    Latest over 9 years ago
    by David
  • Answered

    Can I use EXEC_RETURN on M0 outside of an exeception for contect switches? +1

    • Cortex-M0
    • Armv6-M
    • Cortex-M
    3006 views
    1 reply
    Latest over 9 years ago
    by Simon Craske Arm Employee Badge
  • Answered

    How to measure CPU utilization of ARM processors ? 0

    • Cortex-A15
    • Cortex-A
    10434 views
    1 reply
    Latest over 9 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    Why does the ARM A15 processor have so many DVFS levels ? 0

    • Cortex-A15
    • Cortex-A
    6496 views
    3 replies
    Latest over 9 years ago
    by Peter Harris Arm Employee Badge
  • Not Answered

    TM4C129 - Protect the code from copy 0

    • Cortex-M
    5010 views
    3 replies
    Latest over 9 years ago
    by Amir
  • Not Answered

    how should a FPGA engineer learn ARM based micro processors? 0

    • Cortex-A
    • Cortex-M
    9186 views
    6 replies
    Latest over 9 years ago
    by vikasp
  • Answered

    Kernel page table makes page fault although other core already mapped. 0

    • Cortex-A9
    • Cache
    • Cortex-A
    8974 views
    10 replies
    Latest over 9 years ago
    by Yeo Reum Yun
  • Answered

    Cortex 32b/64b processors with Data Trace capability? 0

    • Cortex-A9
    • Cortex-A
    3843 views
    2 replies
    Latest over 9 years ago
    by Andreas Koch
  • Answered

    Does anyone use assembler only with an ARM MCU? +1

    • Cortex-M
    • C
    • Cortex-M4
    4911 views
    5 replies
    Latest over 9 years ago
    by Peter Grey
  • Answered

    Do ARM processors have power good signal to check quality of incoming power? 0

    • Cortex-M
    • Cortex-M4
    4521 views
    3 replies
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    LPC1837 Backup Registers +1

    • Cortex-M3
    • Cortex-M
    3071 views
    1 reply
    Latest over 9 years ago
    by G. Goodwin L. Pitos
  • Answered

    Can anyone tell me where I can download the latest Cortex M4 Technical Reference Manual 0

    • Cortex-M
    • Cortex-M4
    7640 views
    6 replies
    Latest over 9 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    How can youtubers apply for ARM DSP 'Lab-in-Box' kits 0

    • CMSIS
    4835 views
    2 replies
    Latest over 9 years ago
    by Nathan Clough Arm Employee Badge
  • Answered

    How many cycles requires the instruction QBNE? +1

    • Cortex-A
    • Cortex-A8
    8865 views
    6 replies
    Latest over 9 years ago
    by G. Goodwin L. Pitos
  • Answered

    Problem with understanding memory barriers and problem of barriers taking too long time to execute in ARM Cortex-A15 corepack +1

    • Cortex-A15
    • Cortex-A
    8024 views
    3 replies
    Latest over 9 years ago
    by Arif Erman Kulunyar
  • Answered

    Interrupt handling in ARM +1

    • Cortex-M
    10090 views
    8 replies
    Latest over 9 years ago
    by Girish Raghavendran
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