QBNE (Quick branch not equal)
Using the PRU in the Beaglebone black (AM335x 1GHz ARM® Cortex-A8) I am asking how many cycles requires the instruction QBNE?
qbeq myLabel, r1, 0
I suppose two if the comparison is false: one is for compare and one is for the jump.
Instead, one, just the compare.
Thanks,
Br
The documents we can get from ARM Infocenter relate only to the main microprocessor unit of the AM335x. The technical documents for the PRU-ICSS should come from TI.
From the experimental test the DelayON needs 200000ns (200us) for execute the 20000 loop.So, with 5ns per cycle, QBNE requires just 1 cycle for instruction.
From the experimental test the DelayON needs 200000ns (200us) for execute the 20000 loop.
So, with 5ns per cycle, QBNE requires just 1 cycle for instruction.
More likely this is correct. (Perhaps) the Quick Branch instructions are called Quick Branch, rather than just Branch, because they execute in just 1 cycle.