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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3628 Questions
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  • Not Answered

    coherence between R82 and other cpu or hardware modules 0

    • cortex-r8
    3147 views
    4 replies
    Latest over 5 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Not Answered

    Reduced Virtual Interrupt Controller RVIC 0

    8239 views
    2 replies
    Latest over 5 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Suggested Answer

    CMSIS Core legacy Version 0

    3536 views
    6 replies
    Latest over 5 years ago
    by Andy Neil
  • Not Answered

    Fixed burst and AxLEN relationship 0

    19990 views
    3 replies
    Latest over 5 years ago
    by Colin Campbell Arm Employee Badge
  • Answered

    Cortex-M33 - SVC call from non-secure code does not trigger non-secure SVC exception 0

    • Real Time Operating Systems (RTOS)
    • Trusted Firmware-M
    • TrustZone for Armv8-M
    • Armv8-M
    7022 views
    3 replies
    Latest over 5 years ago
    by Michael Jung
  • Not Answered

    Understanding Linker Map function addresses for Thumb code in Keil uVision 0

    • Keil
    • uVision
    • Arm MAP
    • Debugging
    • Cortex-M4
    2612 views
    0 replies
    Started over 5 years ago
    by Michael Hul
  • Answered

    Porting between different Vendors 0

    3352 views
    4 replies
    Latest over 5 years ago
    by Andy Neil
  • Not Answered

    boot config Stm32g0 0

    3670 views
    3 replies
    Latest over 5 years ago
    by Alejandran
  • Suggested Answer

    Cortex 8.2A : FEAT_SHA3 0

    6946 views
    9 replies
    Latest over 5 years ago
    by br-dev
  • Not Answered

    Does E0PD mechanism provide Meltdown mitigation? 0

    20585 views
    1 reply
    Latest over 5 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Not Answered

    why output of rndr instruction is mixed with bootloader's entropy to form linux kaslr on arm64 0

    • Armv8-A
    4502 views
    3 replies
    Latest over 5 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Not Answered

    Fault Handler for ARM Cortex-A Series on Beaglebone Black 0

    • BeagleBone Black
    • Cortex-A8
    3358 views
    2 replies
    Latest over 5 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Not Answered

    External Private Peripheral Bus +1

    • CoreSight Architecture
    • Cortex-M
    • Debugging
    3228 views
    1 reply
    Latest over 5 years ago
    by Haiyan Arm Employee Badge
  • Not Answered

    Debug Armv8-A alternative in ARM DS 0

    • Armv8-A
    • Armv8 Foundation Platform
    4494 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    Accessing Arm cortex M3 processor inside FPGA using xilinx JTAG 0

    3518 views
    2 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    how to understand multi-copy atomicity and who is in charge to maintain this property 0

    • Armv8-A
    10477 views
    6 replies
    Latest over 5 years ago
    by summer123
  • Not Answered

    Are 128 bits atomic accesses possible with Cortex-A35? 0

    • Cortex-A35
    • 128-bit
    4147 views
    3 replies
    Latest over 5 years ago
    by Oliver Beirne Arm Employee Badge
  • Not Answered

    recovery from illegal instruction Undef Abort exception 0

    3194 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    Cortex M7 cache ECC error 0

    • Cortex-M7
    3751 views
    1 reply
    Latest over 5 years ago
    by Robert McNamara
  • Not Answered

    Record trace on-chip with ETM on STM32H7 (Cortex M7) 0

    • stm32 h7
    • CoreSight ETM-M7
    2800 views
    0 replies
    Started over 5 years ago
    by GuillaumeP
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