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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3590 Questions
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  • Answered

    I want to know priority of Cortex-M3 processor 0

    • Cortex-M3
    • Cortex-M
    13685 views
    6 replies
    Latest over 11 years ago
    by kyujin
  • Answered

    Cortex-M0 or Cortex-M3? 0

    • Cortex-M
    20742 views
    7 replies
    Latest over 11 years ago
    by Jens Bauer
  • Answered

    Changing interrupt priority to prevent nesting 0

    • Cortex-M
    20022 views
    3 replies
    Latest over 11 years ago
    by Fabrizio Da Ros
  • Answered

    Setting up IRQ in ARM 0

    • Interrupt
    23557 views
    8 replies
    Latest over 11 years ago
    by Amit Singh Tomar
  • Answered

    Freescale K22 Cortex-M4  cpu : why Core Lock Up state occurs ??? 0

    • Cortex-M
    9705 views
    6 replies
    Latest over 11 years ago
    by Niall Cooling
  • Answered

    Cortex-M3 Hard Fault - find cause?!?!?!? 0

    • CHI
    • Cortex-M3
    • Cortex-M
    • Memory
    21857 views
    2 replies
    Latest over 11 years ago
    by Nae Alecu
  • Answered

    axi protocol - Beat definition 0

    • AMBA|AXI
    33638 views
    2 replies
    Latest over 11 years ago
    by Alban Rampon
  • Answered

    AXI SLAVE PERIPHERAL 0

    • Cortex-A9
    • AXI
    • Cortex-A
    • Memory
    15650 views
    9 replies
    Latest over 11 years ago
    by Antonio
  • Answered

    Count Leading Zeros +1

    • Arm9
    9740 views
    7 replies
    Latest over 12 years ago
    by Jacob Bramley Arm Employee Badge
  • Answered

    ARM7TDMI: SUBS vs SUB + CMP +1

    • Arm7
    20049 views
    7 replies
    Latest over 12 years ago
    by Simon Craske Arm Employee Badge
  • Answered

    Best Performance processor in ARM1136 or ARM926? +1

    • performance
    • Arm9
    • Arm11
    5375 views
    3 replies
    Latest over 12 years ago
    by Peter Harris Arm Employee Badge
  • Not Answered

    What is the general purpose register number for LR in Cortex M3 0

    • Cortex-M3
    • Cortex-M
    4180 views
    2 replies
    Latest over 12 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    ARM926ejs Cache linefill +1

    • Arm9
    6011 views
    4 replies
    Latest over 12 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    How does ARM11 respond to a non-secure interrupt in secure mode? +2

    • Arm11
    • Interrupt
    5815 views
    2 replies
    Latest over 12 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    About TRACE32, DMA, and CACHE +1

    • Trace
    • Arm9
    • Debugging
    10661 views
    6 replies
    Latest over 12 years ago
    by guestposter guestposter
  • Not Answered

    Shortest code for memory to memory transfer 0

    • Cortex-M3
    • Cortex-M
    • Memory
    4116 views
    2 replies
    Latest over 12 years ago
    by Simon Craske Arm Employee Badge
  • Answered

    compile time constant expressions +1

    • compiler
    • optimization
    • Arm9
    • arm926ej-s
    • MPI
    6379 views
    4 replies
    Latest over 12 years ago
    by Simon Craske Arm Employee Badge
  • Not Answered

    Cortex A8 Problem with RVDS or ARM GCC? 0

    • GCC
    • Cortex-A
    • Cortex-A8
    5576 views
    3 replies
    Latest over 12 years ago
    by Simon Craske Arm Employee Badge
  • Answered

    ARM6TDMI Microcontroller +1

    • ARM6
    • ARM6TDMI
    4239 views
    3 replies
    Latest over 12 years ago
    by Jacob Bramley Arm Employee Badge
  • Answered

    ARM1176JZ-S, cache confg: effective cache size calculation +1

    • ARM1176JZ-S
    • Arm11
    9329 views
    11 replies
    Latest over 12 years ago
    by Peter Harris Arm Employee Badge
<>
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