This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Adding External E2PROM, PROM or SRAM to a basic M0 development board

I'm not quite sure if this is the right place to ask the question so please forgive me if I've made a mistake.

I am developing a variable-rate ACELP Wideband decoder for the M0. While the code and work-RAM are small, I need a lot of space to store a datastream of speech to decode. I've talked with PragmatIC and they do have a CMOS M0 core on their road-map. My idea is to add mask ROM because at scale, it is an incredibly cheap and small form of data storage.

While my initial aim is to incorporate it into the support processors of the current generation of consoles. They all use an ARM core so M0 is certain to work on all implementations and being a pure assembly language programmer, I can get very close to ARM processing speeds in Thumb.

However, to develop such a thing on an M0 board does mean I need a decent amount of memory to store a decent amount of speech to demonstrate the system. I know that 72Mbit SRAMs are available but they seem to use a huge number of pin-outs and E2PROM and related are all slow (even a 48MHz CPU needs to add a wait-state) because normally the data is copied into RAM and the sizes don't tend to be huge.

Am I correct in thinking that I should use the AHB-APB Bridge C (marked Peripherals) which appears to offer TC0-TC7 i.e. an 8-bit data-bus which would be fine as data is read as a byte-stream.

The data-rate is variable. Speech is compressed to achieve a signal-to-noise ratio >20dB thus the number and length of tracks and number of bits allocated to LPC pitch-prediction keep changing. I noted that Audible is fixed and the spaces between words still has a background hiss. I concluded that the hiss could be encoded using 2 or maybe just 1 track with quite a long code-word size.

For console work, it's designed to make it easier to support multiple languages and since in every case it is the support chip that is responsible for audio, inserting speech on said chip made things easier.

As far as it goes with PragmatIC, the work of Vamsi Talla that has resulted in a mobile phone that harvests power from TV broadcast, Wi-Fi and other prevalent background EMR is a good fit for smart packaging. Imagine food packaging with recipes spoken by a celebratory chef, white goods with spoken operating instructions and 'bubblegum cards' each with a short story. A friend is developing a similar system for graphics encoding. The encoder is highly complex but the decoder is very simple.

It is this asymmetric CPU-bandwidth model that is almost unrepresented. DVD and Blue Ray are other examples but the increase in processing power since their inception that has eroded those particular models. My friend has been writing what he calls SPEG - 'Simpsons Picture Expert Group'. The MPEG2 video codec is designed for general images but still manages to leave artifacts when dealing with block colour with black outlines. He got angry at the greed and wastefulness of Box-Set releases. Seasons 1-24 are on 124 discs! 5 discs per series of 22 episodes! That is less than 2 hours per disc! It turns out that you can get a series easily on 2 single-sided discs and to avoid waste, a single double-sided disc would contain the whole series. It's wasteful right from the materials to the duplication to the packaging to the distribution and finally to the convenience of taking said box-set home!

I digress. Put simply, we believe that the IoT will be based on the M0. At under 2mm^2 you can't make a much cheaper chip and correct me if I'm wrong but 28nm fabrication size is the most economical and MROM storage just uses rows x columns (x levels) of the smallest feature (a line) that either is or is not a junction so only the but of MROM being access has to be powered so it's also the lowest energy?

Sorry to OT but I'm an assembly-language bare-metal programmer (although I would use MBed if it became universal) and PragmatIC is offering a totally new kind of processor product that is 20 years behind silicon (their words). That means looking back 20 years would still see an M0 with it's 12000 gates as a very simple. The original P5 had gate count in the millions.

Thanks for your time.

PS PragmatIC think the speech stuff is 2 years away but by introducing it into consoles via their ARM cores is a way to publicize the idea and it expands the uses of the metal-on-cling-film uses. The video-codec obviously won't have LONG videos but bubblegum cards with a cartoon short would be popular with kids. 

PPS for those thinking that streaming from the net is a better option, consider that sets of audio.video are released so to get a full set, customers buy multiple units. The ClingfilmPC is so cheap, it's an added-value concept for the people using the idea.

Parents
  • TLDNR;
    Anyway, for the demo, how much RAM do you need? Why not go for a demonstrator on a Cortex-M3/M4 with sufficient RAM and downclock it. Or use for example an LPC4xxx which uses a CM4/CM0 combo: Let the CM4 do the "RAM simulation" and the CM0 the actual job?

Reply
  • TLDNR;
    Anyway, for the demo, how much RAM do you need? Why not go for a demonstrator on a Cortex-M3/M4 with sufficient RAM and downclock it. Or use for example an LPC4xxx which uses a CM4/CM0 combo: Let the CM4 do the "RAM simulation" and the CM0 the actual job?

Children