thumb 2 instruction set

cray do you mean this ?
cortex M does not support ARM instruction which is 32 bit but instead it supports thumb-2 (mix of both 16 and32 bit) instructions?

if i get clarity in this then my question will be solved.
and thanks for telling me to read the manual pdf it is helping me

cray do you mean this ?
cortex M does not support ARM instruction which is 32 bit but instead it supports thumb-2 (mix of both 16 and32 bit) instructions?

if i get clarity in this then my question will be solved.
and thanks for telling me to read the manual pdf it is helping me

yes, your understanding is correct.

cary i was learning stm32f407VG micro controller and there was something called prefetch i know the meaning of what it is but could you pls provide some more info on that

The purpose of the Prefetch Unit (PFU) is to:
• Fetch instructions in advance and forward PC relative branch instructions.
Fetches are speculative in the case of conditional branches
• Detect Thumb-2 instructions and present these as a single instruction word.
• Perform vector loads.
The PFU fetches instructions from the memory system that can supply one word each
cycle. The PFU buffers up to three word fetches in its FIFO, which means that it can
buffer up to three Thumb-2 instructions or six Thumb instructions.
The majority of branches that are generated as the ALU addition of PC plus immediate
are generated no later than the decode phase of the branch opcode. In the case of
conditionally executed branches, the address is speculatively presented (consuming a
fetch slot on the bus), and the forwarded result determines if the branch path flushes the
fetch queue or is preserved.
Short subroutine returns are optimized to take advantage of the forwarding behavior in
the case of BX LR.

search DDI0337E_cortex_m3_r1p1_trm.pdf
arm_cortexm3_processor_trm_100165_0201_00_en.pdf