We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.
Hi,
Linux Kernel 4.9
Processor a53
SMP 64 Bit linux image
Issue seen:- Ethernet interrupts are seen arriving only on core0 ONLY, though core0 is completely occupied by other interrupts.
moving ethernet interrupts to other core via smp_affinity, helps drastic reduction in latency [increase in output/Transmi packets per second]
questions
1. if i understand correctly there is GIC based distributor inside ARM processor
2. my dts does init the GIC
3. Is there any config or setting required in Linux build [any change in dts or CONFIG in linux ]to ENABLE interrupt distributor?
4. my understanding was SMP Linux itself defaults to distribution in interrupts across cores,
please point to any resource/notes in this regard
Thanks
RC Reddy
After going through this post, i understood that irqbalance is alternative to smp_affinity and irqbalance MUST be added on top of linux to balance interrupts
https://community.arm.com/processors/f/discussions/2591/how-does-the-gic-distribute-interrupts-between-processors
i conclude this post of mine
Thanks,