• State Accepted Answer
  • +1 person also asked this people also asked this
  • Locked Locked
  • Replies 2 replies
  • Subscribers 351 subscribers
  • Views 5796 views
  • Users 0 members are here
2025 survey

We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.

Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

"CPSIE I"on an ARMv7A not changing the I bit in the CPSR register in USR mode - why?

m0sf3tz

I'm using a CortexA8 and I can't seem to enable interrupts...! 

I'm using a "CPSIE I" instruction, I can see that the compiler (GCC) is not optimizing my code out... I have to manually stop the program with a debugger and update the I bit myself before I can see an interrupt fire..!? 

Why? Any help would be much appreciated!

Cheers!

Parents
  • +1 Arm Employee Badge in reply to m0sf3tz

    Yes, it's because you are in User mode.  User mode can't control the interrupt masks (CPSR.I/F), as this would allow it to prevent re-entry into the OS.  (That doesn't mean that CPSR.I/F cannot be b1 in User mode, just that User mode cannot set them b1 itself).

    So yes, you would need to move to a privileged mode to change the state of the interrupt masks.  Typically that would be a system call, which would mean using a SVC.

Reply
  • +1 Arm Employee Badge in reply to m0sf3tz

    Yes, it's because you are in User mode.  User mode can't control the interrupt masks (CPSR.I/F), as this would allow it to prevent re-entry into the OS.  (That doesn't mean that CPSR.I/F cannot be b1 in User mode, just that User mode cannot set them b1 itself).

    So yes, you would need to move to a privileged mode to change the state of the interrupt masks.  Typically that would be a system call, which would mean using a SVC.

Children
No data