Hi , I am New to this Community
I am Studying now Cortex-M3 .. I am reading Joseph Yiu book...
I am Confused in the part of the instruction set , and I couldn't get the following:
as i understand that some of the original ARM 32-bit instructions are 32-bit encoded and could be Executed as 32-bit instruction
if the processor in Thumb mode otherwise in ARM mode All instructions should be only 32-bit ... Thumb-2 Allow Execution of both 16-bit and 32 bit instructions .....Now my questions :
1) 16-bit Thumb instructions are subset of the original ARM but 16-bit encoded , but in Thumb-2 the rest 32-bit instructions where did they come from , are they are the rest of the ARM ISA that where not 16-bit encoded ?
2) I read that some instructions could be represented as 16-bit or 32-bit equivalent , Now why and How an instruction could have two formats(16- and 32- ) please give an example .
3) how could I group instructions into three groups (16- bit only) , (32-bit only) , (could be represented as either)?
please elaborate ...
thanks
At first I recommend to check out ARM ARM (DDI0100i) which lists all instructions. Also DDI0406C which tells you for each instruction which architecture (4T, 5T, 7) it supports.
The original Thumb ISA was in fact just a short-hand coding of the ARM instruction, but not all ARM instruction were represented. So for certain jobs one had to use ARM 32bit ISA. Thumb-2 instead is a real ISA and they added instructions from ARM 32 bit world to allow staying in Thumb-2 mode. Since there was no more space left in the 16bit encoding, 32bit instruction were needed.As to my knowledge there are no 32bit Thumb-2 instruction which to 100% the same thing as a 16bit instruction.Very often the 32bit variant (e.g. ADC) uses 3 registers whereas the 16bit version only 2.Again, read the instruction set listed in DDI0406C.
First of All Thanks for your Answer , after asking that question I consulted the the ARMv7-M Equivelent of the Document you have just mentioned ... I found that in some cases 16-bit instructions could be represented as 32-bit version and vice versa in special cases .. but that require some assembler Intelligence ..[that was not explicitly mensioned but i understood that .. see section A7.7.2]. ADC(register version) if The destination is the same as the first register you can represent it using the 32-bit corresponding Encoding setting the second register same as destination and making the shift value to be added Equal to zero .. it will have the same effect.... going backward requires shift value to be zero and the destination register is the same as the first register ..
But I'd Like to make sure from you is Thumb-2 an instruction set or a technology the enable 32-bit Instructions (subset of ARM IS) and 16-bit instructions to be excuted in the same mode ?
On Cortex-M you have only Thumb-2. Only Cortex-R/A have also ARM ISA. But anyway, a 32bit Thumb-2 instruction is a native Thumb-2 instruction and not an ARM instruction.
Thanks for your Answer