Cortex M4 (LPC4370): how do I detect ADC threshold crossing while moving data in a DMA driven double buffer?

Hi Thibaut ZEISSLOFF, 
thanks for your replies.
I must process a signal which is basically a pulse signal. That is: gaussian shape and almost constant lenght:
This signal is not periodic, but my firmware should be able to process a 30 kcount/s flow.
Strictly speaking, no: I don't need to perform a continuous processing, I just need the processing to be done before the next peak is completely acquired. And yes, fixed number of samples to be processed. The pulse length is roughly 10 us, so let's say @30 kcount/s that gives a 30% duty cycle. Since I'm acquiring @40 msps I need to process 400 samples in 20us.

At the momenti I managed to set up the DMA transfer in a ping-pong buffer which is always running. The DMA isr (raised at the end of a sub-buffer transfer) then contains some if statements that check for the ADCHS flag and eventually process the acquired data.

I understand what you suggest, but am I wrong thinking that triggering the DMA transfer would be too slow? Is this faster that switching between interrupts?
I know this question may seem rhetorical,  and I'm sorry for this.

Thanks again!

Hi Thibaut ZEISSLOFF, 
thanks for your replies.
I must process a signal which is basically a pulse signal. That is: gaussian shape and almost constant lenght:
This signal is not periodic, but my firmware should be able to process a 30 kcount/s flow.
Strictly speaking, no: I don't need to perform a continuous processing, I just need the processing to be done before the next peak is completely acquired. And yes, fixed number of samples to be processed. The pulse length is roughly 10 us, so let's say @30 kcount/s that gives a 30% duty cycle. Since I'm acquiring @40 msps I need to process 400 samples in 20us.

At the momenti I managed to set up the DMA transfer in a ping-pong buffer which is always running. The DMA isr (raised at the end of a sub-buffer transfer) then contains some if statements that check for the ADCHS flag and eventually process the acquired data.

I understand what you suggest, but am I wrong thinking that triggering the DMA transfer would be too slow? Is this faster that switching between interrupts?
I know this question may seem rhetorical,  and I'm sorry for this.

Thanks again!

Hi Thibaut, I looked at the doc (here it is for your reference) and this is what I found.

In chapter 48, section 48.7.4.1 DMA read:

The FIFO can be read by DMA channel 8. A DMA transfer request is generated when the FIFO fill level is equal to or more than set by FIFO_LEVEL. This is the same behavior that will raise the interrupt flag FIFO_FULL. The burst size can be set to one in the DMA channel control register (see Table 350). If the FIFO fill level is not equal to one of the other DMA-supported burst sizes (applicable DMA burst sizes are 1, 4, 8 or 16), set the burst size to 1. Reading an empty FIFO will result in a value 0x00008000 or 0x80008000.

And that's it. The problem is that looking back to scetion 4.6.9 threshold A/B register a detection can occur only after conversion, in fact:

If, for two successive conversion results on a given channel, one result is below a
threshold and the other is equal-to or above this threshold, then a threshold crossing has
occurred. In this case the THCMP_CROSS (see Section 48.6.10) status bits will indicate
that a threshold crossing has occurred. A threshold crossing event will also generate an
interrupt 1 request if enabled to do so via the SET_EN1 bits associated with each channel
in the SET_EN1 register.

So I suspect the ADC must be up and running all the time.
Plus, there is the option to external-trigger the ADC conversion, but that can be done only through standard GPIO which I believe are digital comparators. The amplitude of my input signal changes over time (that's where the physical information I'm interested in is hidden): I think I would need to design a specific analog amplifier in order to work this way.

I'd love to know if there's a way to fill the fifo only after a threshold cross, this should work if combined with the DMA read request at a certain fifo level.

Many thanks for your help Thibaut.

Regards,
Andrea

Connect the DMA channel to the timer, to use it (the timer) as a trigger: I looked at an LPCOpenV2.20 example, but I think is not working. Also, after writing the function to setup the timer and trigger the DMA, they kindly commented it. Nice one.
This is the setup:

/* Setup DMA M2M transfer to trigger on timer match */
static void setupDMATrigger(void)
{
	/* Initialize GPDMA controller */
	Chip_GPDMA_Init(LPC_GPDMA);

	/* Get DMA channel */
	dmaCh = Chip_GPDMA_GetFreeChannel(LPC_GPDMA, GPDMA_CONN_MAT0_0);

	/* Setup DMA transfer */
	Chip_GPDMA_Transfer(LPC_GPDMA, dmaCh,
					  (uint32_t) &source[0], GPDMA_CONN_MAT0_0, //(uint32_t) &dest[0],
					  GPDMA_TRANSFERTYPE_M2M_CONTROLLER_DMA,
					  sizeof(source));

//			Chip_GPDMA_Stop(LPC_GPDMA, dmaChSSPTx);

	/* Enable GPDMA interrupt */
	NVIC_EnableIRQ(DMA_IRQn);
}

int main(void)
{
	int numDmaXfers = 0;

	SystemCoreClockUpdate();
	Board_Init();

	/* Setup tiemr capture input used for DMA trigger */
	setupTimerCapInput();

	/* Setup timer for match event on each capture event */
	setupTimerTrigger();

	/* Setup DMA for memory to memory transfer on timer match event */
//	setupDMATrigger();
	/* Enable timer interrupt */
	NVIC_EnableIRQ(TIMER0_IRQn);
	NVIC_ClearPendingIRQ(TIMER0_IRQn);

	/* Idle in background waiting for DMA events */
	while (1) { ... etc...