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Architectures and Processors forum External Abort and Transition between Non Secure & Secure world

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External Abort and Transition between Non Secure & Secure world

Vincent Siles over 7 years ago

Hi !

My question is about the behavior of external aborts: I had to strange behavior on a board that I can only explain by the fact the Linux triggered an external abort (trying to access data/registers protected by a TZASC or CSU for example) just before an FIQ triggered a switch from Linux to the Monitor.

Once in the monitor, External Abort are masked, so I got the actual External Abort fault in my secure kernel.

1) Is this scenario possible ?

2) If that's the case, I'd like to test if there is an external abort "pending" in the monitor, is this possible ?

Best,

Vincent

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+1 Peter Rielly over 7 years ago

The ISR register (MRC p15,0,<Rt>,c12,c1,0) will indicate if there is a pending ext abort (or IRQ and FIQ.)
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+1 Peter Rielly over 7 years ago

The ISR register (MRC p15,0,<Rt>,c12,c1,0) will indicate if there is a pending ext abort (or IRQ and FIQ.)
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0 Vincent Siles over 7 years ago in reply to Peter Rielly

Great ! Thank you Peter Rielly I missed that one. By the way, is it possible to "clear" the asynchronous abort without actually taking it, or should I detect the EA, and add a 'dummy' handler just to clean the ISR.A bit ?
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0 Peter Rielly over 7 years ago in reply to Vincent Siles

Hi Vincent,

You need to take the exception to clear out the pending abort. You can leave it pending for ever though.
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